System and method for adaptive linearization of RF amplifiers

Patent metadata

Field	Value
Publication number	US-9252715-B2
Application number	US-201414211068-A
Country	US
Kind code	B2
Filing date	Mar 14, 2014
Priority date	Mar 14, 2014
Publication date	Feb 2, 2016
Grant date	Feb 2, 2016

Abstract

A variable-bias power amplifier is provided, comprising: a first variable voltage source generating first bias voltages based on bias control signals; a first amplifier circuit amplifying an output RF signal to generate a first amplified signal based on the first bias voltages; a second variable voltage source generating second bias voltages based on the bias control signals; a second amplifier circuit amplifying the output RF signal to generate a second amplified signal based on the second bias voltages; and a DC isolation circuit between the first amplifier circuit and the second amplifier circuit, electrically isolating DC currents at the first amplifier from DC currents at the second amplifier, wherein the first variable voltage source can be controlled independently from the second variable voltage source, and the first amplifier circuit, the second amplifier circuit, and the DC isolation circuit are all formed on a single die.

First claim

What is claimed is:

1. A variable-bias power amplifier, comprising:
a first variable voltage source configured to generate a first bias voltage based on at least one of two or more bias voltage control signals;
a first amplifier circuit configured to amplify an output RF signal to generate a first amplified signal based on the one or more first bias voltages;
a second variable voltage source configured to generate a second bias voltage based on at least one of the two or more bias voltage control signals;
a second amplifier circuit configured to amplify the output RF signal to generate a second amplified signal based on the one or more second bias voltages; and
a first DC isolation circuit located between the first amplifier circuit and the second amplifier circuit, the first DC isolation circuit being configured to electrically isolate DC currents at the first amplifier circuit from DC currents at the second amplifier circuit,
wherein
the first variable voltage source can be controlled independently from the second variable voltage source,
the first amplifier circuit, the second amplifier circuit, and the first DC isolation circuit are all formed on a single die.

2. The variable-bias power amplifier of claim 1 , the variable voltage source, wherein
the first variable voltage source is formed on a first side of the single die, and the second variable voltage source is formed on a second side of the single die opposite the first side.

3. The variable-bias power amplifier of claim 1 , wherein the first amplified signal and the second amplified signal are combined to form a single amplified output signal.

4. The variable-bias power amplifier of claim 1 , wherein the first amplifier circuit comprises a plurality of transistor fingers arranged in parallel.

5. The variable-bias power amplifier of claim 4 , wherein the plurality of transistor fingers each comprise a plurality of transistors arranged in series.

6. The variable-bias power amplifier of claim 1 , wherein the first amplifier circuit and the second amplifier circuit have a different number of fingers.

7. The variable-bias power amplifier of claim 1 , wherein the variable-bias power amplifier is a Doherty amplifier.

8. The variable-bias power amplifier of claim 1 , further comprising:
third through N th variable voltage sources configured to generate one or more third bias voltages through one or more N th bias voltages based on the two or more bias voltage control signals;
third through N th amplifier circuits configured to amplify the output RF signal to generate a third through N th amplified signals based on the one or more third bias voltages through the one or more N th bias voltages; and
second through (N−1) th DC isolation circuits, each located between an adjacent pair of the
second through N th amplifier circuits, the second through (N−1) th DC isolation circuits each being configured to electrically isolate DC currents at the corresponding adjacent pairs of the second through N th amplifiers,
wherein
the first through N th amplifier circuits, and the first through (N−1) th DC isolation circuits are all formed on a single die,
N is an integer greater than 3.

9. A variable-bias radio frequency (RF) amplifier, comprising:
a digital front end circuit configured to adjust an input RF signal to generate an adjusted input RF signal, and configured to generate two or more bias voltage control signals;
a receiver circuit configured to process the adjusted input RF signal to generate an initial output RF signal; and
a power amplifier configured to amplify the initial output RF signal to generate an amplified output RF signal based on the two or more bias voltage control signals, the power amplifier including
a first variable voltage source configured to generate a first bias voltage based on at least one of the two or more bias voltage control signals,
a first amplifier circuit configured to amplify the initial output RF signal to generate a first amplified signal based on the one or more first bias voltages,
a second variable voltage source configured to generate a second bias voltage based on at least one of the two or more bias voltage control signals,
a second amplifier circuit configured to amplify the initial output RF signal to generate a second amplified signal based on the one or more second bias voltages, and
a first DC isolation circuit located between the first amplifier circuit and the second amplifier circuit, the first DC isolation circuit being configured to electrically isolate DC currents at the first amplifier circuit from DC currents at the second amplifier circuit,

wherein
the first amplifier circuit, the second amplifier circuit, and the first DC isolation circuit are all formed on a single die,
the first amplified signal and the second amplified signal are combined to form the amplified output RF signal,
the amplified output RF signal is sent as a feedback signal to the digital front end circuit,
the digital front end circuit is further configured to generate the two or more bias voltage control signals based on the feedback signal, and
the first variable voltage source can be controlled independently from the second variable voltage source.

10. The variable-bias RF amplifier of claim 9 , wherein
the first variable voltage source is formed on a first side of the single die, and the second variable voltage source is formed on a second side of the single die opposite the first side.

11. The variable-bias RF amplifier of claim 9 , wherein the first amplified signal and the second amplified signal are combined to form the amplified output signal.

12. The variable-bias RF amplifier of claim 9 , wherein the first amplifier circuit comprises a plurality of transistor fingers arranged in parallel.

13. The variable-bias RF amplifier of claim 12 , wherein the plurality of transistor fingers each comprise a plurality of transistors arranged in series.

14. The variable-bias RF amplifier of claim 9 , wherein the first amplifier circuit and the second amplifier circuit are of different sizes.

15. The variable-bias power amplifier of claim 9 , wherein the power amplifier is a Doherty amplifier.

16. The variable-bias RF amplifier of claim 9 , wherein the power amplifier further includes third through N th variable voltage sources configured to generate one or more third bias voltages through one or more N th bias voltages based on the two or more bias voltage control signals;
third through N th amplifier circuits configured to amplify the initial output RF signal to generate a third through N th amplified signals based on the one or more third bias voltages through the one or more N th bias voltages; and
second through (N−1) th DC isolation circuits, each located between an adjacent pair of the second through N th amplifier circuits, the second through (N−1) th DC isolation circuits each being configured to electrically isolate DC currents at the corresponding adjacent pairs of the second through N th amplifiers,
wherein
the first through N th amplifier circuits, and the first through (N−1) th DC isolation circuits are all formed on a single die,
N is an integer greater than 3.

17. A method of amplifying a radio frequency (RF) signal, comprising:
setting first through N th bias voltages on first through N th power amplifiers to first through N th initial bias voltage values, respectively;
providing an RF signal from digital front end circuitry to the first through N th power amplifiers to generate an RF output signal;
providing the RF out

Assignees

• Jones Jeffrey K
• Hart Paul R
• Watts Michael E
• Freescale Semiconductor Inc

Inventors

• Jones Jeffrey K
• Hart Paul R
• Watts Michael E

Classifications

• H03F2200/555

  A voltage generating circuit being realised for biasing different circuit elements · CPC title

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03F1/0288 Primary

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03F3/68

  Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics {(power amplifiers using a combination of several semiconductor amplifiers H03F3/211; combinations of amplifiers using coupling networks with distributed constants H03F3/602)} · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title