Ultra thin hit solar cell and fabricating method of the same

US9252316B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9252316-B2
Application numberUS-201514676075-A
CountryUS
Kind codeB2
Filing dateApr 1, 2015
Priority dateApr 2, 2014
Publication dateFeb 2, 2016
Grant dateFeb 2, 2016

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

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Disclosed is an ultra-thin HIT solar cell, including: an n- or p-type crystalline silicon substrate; an amorphous silicon emitter layer having a doping type different from that of the silicon substrate; and an intrinsic amorphous silicon passivation layer formed between the crystalline silicon substrate and the amorphous silicon emitter layer, wherein the HIT solar cell further includes a transparent conductive oxide layer made of ZnO on an upper surface thereof, and the surface of the crystalline silicon substrate is not textured but only the surface of the transparent conductive oxide layer is textured, and thereby a very thin crystalline silicon substrate can be used, ultimately achieving an ultra-thin HIT solar cell having a very low total thickness while maintaining light trapping capacity.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing an ultra-thin HIT solar cell, comprising: preparing an n- or p-type crystalline silicon substrate; forming an intrinsic amorphous silicon passivation layer on an upper surface of the crystalline silicon substrate; forming an amorphous silicon emitter layer having a doping type different from that of the silicon substrate on an upper surface of the passivation layer; and forming a transparent conductive oxide layer with ZnO on an upper surface of the amorphous silicon layer, wherein a surface of the transparent conductive oxide layer is textured upon forming the transparent conductive oxide layer. 2. A method of manufacturing an ultra-thin HIT solar cell, comprising: preparing an n- or p-type crystalline silicon substrate; forming an intrinsic amorphous silicon passivation layer on each of both surfaces of the crystalline silicon substrate; forming an amorphous silicon emitter layer having a doping type different from that of the silicon substrate on a surface of one intrinsic amorphous silicon passivation layer, and forming an amorphous silicon back surface field layer having the same doping type as that of the silicon substrate on a surface of the other intrinsic amorphous silicon passivation layer; and forming a transparent conductive oxide layer with ZnO on a surface of either the amorphous silicon emitter layer or the amorphous silicon back surface field layer, wherein a surface of the transparent conductive oxide layer is textured upon forming the transparent conductive oxide layer. 3. The method of claim 2 , further comprising forming a lower transparent conductive oxide layer with ZnO on a surface of the amorphous silicon emitter layer or the amorphous silicon back surface field layer, on which the transparent conductive oxide layer was not formed, wherein forming the lower transparent conductive oxide layer is performed in the same manner as forming the transparent conductive oxide layer. 4. The method of claim 1 , wherein forming the transparent conductive oxide layer is performed by forming a boron (B)-doped ZnO (ZnO:B, BZO) thin film using a low pressure chemical vapor deposition (LPCVD) process. 5. The method of claim 4 , wherein the LPCVD process is performed using a ZnO source gas comprising (CH 2 H 5 ) 2 Zn and H 2 O and using a B-containing doping gas comprising B 2 H 6 , under conditions of a deposition pressure of 0.1˜300 Torr and a deposition substrate temperature of room temperature ˜500° C. 6. The method of claim 1 , wherein forming the transparent conductive oxide layer comprises depositing an aluminum (Al)- or gallium (Ga)-doped ZnO thin film and then texturing a surface of the ZnO thin film. 7. The method of claim 6 , wherein depositing the Al- or Ga-doped ZnO thin film is performed using a sputtering process. 8. The method of claim 6 , wherein texturing the surface of the ZnO thin film is performed by chemically etching the surface of the ZnO thin film using an acid solution or an alkali solution.

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Classifications

  • Photovoltaic cells having only PIN junction potential barriers · CPC title

  • comprising only Group IV materials · CPC title

  • made of transparent conductive layers, e.g. transparent conductive oxide [TCO] layers · CPC title

  • Photovoltaic [PV] energy · CPC title

  • H10F10/166Primary

    the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells · CPC title

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What does patent US9252316B2 cover?
Disclosed is an ultra-thin HIT solar cell, including: an n- or p-type crystalline silicon substrate; an amorphous silicon emitter layer having a doping type different from that of the silicon substrate; and an intrinsic amorphous silicon passivation layer formed between the crystalline silicon substrate and the amorphous silicon emitter layer, wherein the HIT solar cell further includes a trans…
Who is the assignee on this patent?
Korea Energy Research Inst
What technology area does this patent fall under?
Primary CPC classification H10F10/166. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Feb 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).