Semiconductor device and a method for forming a semiconductor device

Patent metadata

Field	Value
Publication number	US-9252292-B2
Application number	US-201314027953-A
Country	US
Kind code	B2
Filing date	Sep 16, 2013
Priority date	Sep 16, 2013
Publication date	Feb 2, 2016
Grant date	Feb 2, 2016

Abstract

A semiconductor device includes a semiconductor substrate. The semiconductor substrate includes a first doping region arranged at a main surface of the semiconductor substrate, an emitter layer arranged at a back side surface of the semiconductor substrate, at least one first conductivity type area separated from the first doping region by a second doping region of the semiconductor substrate and at least one temperature-stabilizing resistance area. The first doping region has a first conductivity type and the emitter layer has at least mainly a second conductivity type. The second doping region has the second conductivity type and the at least one first conductivity type area has the first conductivity type. The at least one temperature-stabilizing resistance area is located within the second doping region and adjacent to the at least one first conductivity type area. Further, the at least one temperature-stabilizing resistance area has a lower variation of a resistance over a range of an operating temperature of the semiconductor device than at least a part of the second doping region located adjacent to the at least one temperature-stabilizing resistance area.

First claim

What is claimed is:

1. A semiconductor device with a semiconductor substrate, wherein the semiconductor substrate comprises:
a first doping region arranged at a main surface of the semiconductor substrate, wherein the first doping region comprises a first conductivity type;
an emitter layer arranged at a back side surface of the semiconductor substrate, wherein the emitter layer comprises at least mainly a second conductivity type;
at least one first conductivity type area separated from the first doping region by a second doping region of the semiconductor substrate, wherein the second doping region comprises the second conductivity type and the at least one first conductivity type area comprises the first conductivity type; and
at least one temperature stabilizing resistance area located within the second doping region and adjacent to the at least one first conductivity type area, wherein the at least one temperature stabilizing resistance area comprises a lower variation of a resistance over a range of an operating temperature of the semiconductor device than at least a part of the second doping region located adjacent to the at least one temperature stabilizing resistance area,
wherein the at least one temperature stabilizing resistance area comprises a doping causing energy states with a distance to the conduction band and to the valence band of the semiconductor material of the semiconductor substrate of more than 150 meV.

2. The semiconductor device according to claim 1 , wherein the at least one temperature stabilizing resistance area comprises a doping of a chemical element causing at least two different energy states with a distance to the conduction band and to the valence band of the semiconductor material of the semiconductor substrate of more than 150 meV.

3. The semiconductor device according to claim 1 , wherein the at least one temperature stabilizing resistance area comprises a doping of selenium, sulfur or indium.

4. The semiconductor device according to claim 1 , wherein the doping of atoms causing energy states with a distance to the conduction band and to the valence band of the semiconductor material of the semiconductor substrate of more than 150 meV reaches into a depth between 0.3 μm and 40 μm from the back side surface.

5. The semiconductor device according to claim 1 , wherein the at least one temperature stabilizing resistance area further comprises a doping causing energy states with a distance to the conduction band or to the valence band of the semiconductor material of the semiconductor substrate of less than 100 meV.

6. The semiconductor device according to claim 5 , wherein the at least one temperature stabilizing resistance area comprises a doping of phosphor, arsenic, aluminum or boron.

7. The semiconductor device according to claim 5 , wherein the doping of atoms causing energy states with a distance to the conduction band and to the valence band of the semiconductor material of the semiconductor substrate of less than 100 meV reaches into a depth between 0.3 μm and 40 μm from the back side surface.

8. The semiconductor device according to claim 5 , wherein between 20% and 80% of dopants of the doping of the at least one temperature stabilizing resistance area cause energy states with a distance to the conduction band and to the valence band of the semiconductor material of the semiconductor substrate of more than 150 meV.

9. The semiconductor device according to claim 1 , wherein an average defect density within the at least one temperature stabilizing resistance area is more than twice an average defect density within at least the part of the second doping region located adjacent to the at least one temperature stabilizing resistance area.

10. The semiconductor device according to claim 9 , wherein an average doping concentration within the at least one temperature stabilizing resistance area is more than twice a doping concentration within at least the part of the second doping region located adjacent to the at least one temperature stabilizing resistance area.

11. The semiconductor device according to claim 1 , wherein the at least one first conductivity type area is located within the emitter layer at the back side surface of the semiconductor substrate.

12. The semiconductor device according to claim 1 , comprising a field stop layer adjacent to the emitter layer, wherein the at least one first conductivity type area reaches from the back side surface of the semiconductor substrate to the field stop layer.

13. The semiconductor device according to claim 1 , wherein the at least one first conductivity type area is completely enclosed by the second doping region of the semiconductor substrate.

14. The semiconductor device according to claim 1 , wherein the at least one temperature stabilizing resistance area is located adjacent to the at least one first conductivity type area and at least at a side of the at least one first conductivity type area arranged towards the main surface of the semiconductor substrate.

15. The semiconductor device according to claim 1 , wherein the second doping region comprises at least a field stop layer arranged adjacent to the emitter layer and a drift layer arranged between the field stop layer and the first doping region.

16. The semiconductor device according to claim 1 , implementing a semiconductor diode device or a semiconductor field effect transistor device.

17. The semiconductor device according to claim 1 , comprising a blocking voltage of more than 100V.

18. A semiconductor diode device with a semiconductor substrate, wherein the semiconductor substrate comprises:
a first doping region arranged at a main surface of the semiconductor substrate and in contact with a front side metal layer of the semiconductor diode device, wherein the first doping region comprises a first conductivity type;
an emitter layer arranged at a back side surface of the semiconductor substrate and in contact with a back side metal layer of the semiconductor diode device, wherein the emitter layer comprises at least mainly a second conductivity type;
at least one first conductivity type area located at the back side surface within the emitter layer, wherein the at least one first conductivity type area comprises the first conductivity type, wherein the at least one first conductivity type area is separated from the first doping region by a second doping region comprising the second conductivity type; and
at least one temperature stabilizing resistance area located within the second doping region and adjacent to the at least one first conductivity type area, wherein the at least one temperature stabilizing resistance area comprises a doping causing energy states with a distance to the conduction band and to the valence band of the semiconductor material of the semiconductor substrate of more than 150 meV or an average defect density within the at least one temperature stabilizing resistance area is more than twice an average defect density within at least the part of the second doping region located adjacent to the at least one temperature stabilizing resistance area.

Assignees

• Infineon Technologies Ag

Inventors

• Schulze Hans-Joachim

Classifications

• H10P32/00

  Diffusion of dopants within, into or out of wafers, substrates or parts of devices (during formation of materials H10P14/00) · CPC title

• H10W40/00

  Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60) · CPC title

• H10D84/141

  VDMOS having built-in components · CPC title

• H10D30/66

  Vertical DMOS [VDMOS] FETs · CPC title

• H10D8/00 Primary

  Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title