Semiconductor device and semiconductor die
US-2024387542-A1 · Nov 21, 2024 · US
US9252151B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9252151-B2 |
| Application number | US-201414183152-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 18, 2014 |
| Priority date | Jul 8, 2013 |
| Publication date | Feb 2, 2016 |
| Grant date | Feb 2, 2016 |
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Official abstract text for this publication.
A method of making a monolithic three dimensional NAND string including forming a stack of alternating layers of a first material and a second material over a substrate. The first material comprises an electrically insulating material and the second material comprises a semiconductor or conductor material. The method also includes etching the stack to form a front side opening in the stack, forming a blocking dielectric layer over the stack of alternating layers of a first material and a second material exposed in the front side opening, forming a semiconductor or metal charge storage layer over the blocking dielectric, forming a tunnel dielectric layer over the charge storage layer, forming a semiconductor channel layer over the tunnel dielectric layer, etching the stack to form a back side opening in the stack, removing at least a portion of the first material layers and portions of the blocking dielectric layer.
Opening claim text (preview).
What is claimed is: 1. A method of making a monolithic three dimensional NAND string, comprising: forming a stack of alternating layers of a first material and a second material over a substrate, wherein the first material comprises an electrically insulating material and wherein the second material comprises a semiconductor or conductor material; etching the stack to form a front side opening in the stack; forming a blocking dielectric layer over the stack of alternating laye…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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