Integrated circuit with a sidewall layer and an ultra-thick metal layer and method of making
US-2015048516-A1 · Feb 19, 2015 · US
Trench sidewall protection for selective epitaxial semiconductor material formation
US9252014B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9252014-B2 |
| Application number | US-201314017443-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 4, 2013 |
| Priority date | Sep 4, 2013 |
| Publication date | Feb 2, 2016 |
| Grant date | Feb 2, 2016 |
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Abstract
Official abstract text for this publication.
A method of forming a semiconductor device includes forming an insulator layer over a substrate; opening a trench in the insulator layer so as to expose one or more semiconductor structures formed on the substrate; forming a protective layer on sidewalls of the trench; subjecting the substrate to a precleaning operation in preparation for epitaxial semiconductor formation, wherein the protective layer prevents expansion of the sidewalls of the trench as a result of the precleaning operation; and forming epitaxial semiconductor material within the trench and over the exposed one or more semiconductor structures.
First claim
Opening claim text (preview).
The invention claimed is: 1. A method of forming a semiconductor device, the method comprising: forming an insulator layer over a substrate; opening a trench in the insulator layer so as to expose one or more semiconductor structures formed on the substrate; forming a protective layer on sidewalls of the trench; subjecting the substrate to a precleaning operation in preparation for epitaxial semiconductor formation, wherein the protective layer prevents expansion of the side…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9252014B2 cover?
- A method of forming a semiconductor device includes forming an insulator layer over a substrate; opening a trench in the insulator layer so as to expose one or more semiconductor structures formed on the substrate; forming a protective layer on sidewalls of the trench; subjecting the substrate to a precleaning operation in preparation for epitaxial semiconductor formation, wherein the protectiv…
- Who is the assignee on this patent?
- IBM, Globalfoundries Inc
- What technology area does this patent fall under?
- Primary CPC classification H10P14/276. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).