Decoder, decoding method, memory controller, and memory system
US-2024429941-A1 · Dec 26, 2024 · US
US9246512B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9246512-B2 |
| Application number | US-201013988821-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 2, 2010 |
| Priority date | Dec 2, 2010 |
| Publication date | Jan 26, 2016 |
| Grant date | Jan 26, 2016 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
An error correcting device is provided that has an input connectable to receive one or more data units, an error detection module arranged to identify a presence of one or more errors in a received data unit of the one or more data units and to provide an error detection signal for the received data unit, an error correction module arranged to perform an error correction processing on the received data unit and provide a corrected data unit, and a correction evaluation module arranged to perform a comparison of the received data unit with the corrected data unit and to generate a correction error signal depending on a result of the comparison and the error detection signal.
Opening claim text (preview).
The invention claimed is: 1. An error correcting device, comprising an input configured to receive one or more data units; an error detection module arranged to: detect whether a received data unit includes a presence of one or more errors; and generate and provide an error detection signal for said received data unit, the error detection signal to indicate the presence of no errors in said received data unit, or the presence of one or more errors in said received data unit; an error correction module arranged to: perform an error correction processing on said received data unit; and generate a corrected data unit; a correction evaluation module arranged to: perform a comparison of said received data unit with said corrected data unit; and generate a correction error signal depending on a result of said comparison and said error detection signal; and a selection module to: receive said error detection signal, said received data unit and said corrected data unit, provide said corrected data unit to the output of said error correcting device when said error detection signal indicates a correctable error, and provide said received data unit instead of said corrected data unit to the output in response to the error detection signal indicating that an error-free received data unit is detected, and in response to an error being introduced during said error correction processing performed by said error detection module. 2. The error correcting device as claimed in claim 1 , wherein said correction error signal indicates a false correction and said correction evaluation module is arranged to provide said correction error signal when said error detection signal indicates no error and said result indicates a difference between said received data unit and said corrected data unit. 3. The error correcting device as claimed in claim 1 , wherein said correction evaluation module is arranged to provide said correction error signal when said error detection signal indicates at least one error and said result indicates that said received data unit and said corrected data unit are sufficiently similar. 4. The error correcting device as claimed in claim 1 , wherein said selection module is arranged to provide said received data unit to said output when said error detection signal indicates no error. 5. The error correcting device as claimed in claim 1 , wherein said error detection module is arranged to provide an uncorrectable-error-signal when said received data unit comprises more errors than said error correction module is capable of correcting. 6. The error correcting device as claimed in claim 1 , further comprising a controlling unit configured to receive said correction error signal. 7. The error correcting device as claimed in claim 6 , wherein said controlling unit is configured to receive said error detection signal. 8. The error correcting device as claimed in claim 1 , wherein said error correcting device is arranged to continuously receive sequences of data units. 9. The error correcting device as claimed in claim 1 , wherein said error correcting device is integrated on a single integrated circuit die. 10. A method for monitoring an error correcting device, comprising receiving one or more data units; identifying where a received data unit of the said one or more data units is error-free or includes a presence of one or more errors; providing an error detection signal for said received data unit, the error detection signal indicating that the received data unit is error-free, or that the received data unit includes one or more errors; performing an error correction processing on said received data unit and providing a corrected data unit; performing a comparison of said received data unit with said corrected data unit; providing a correction error signal from a result of said comparison depending on said error detection signal; receiving, at a selection module, said error detection signal, said received data unit and said corrected data unit; providing, by said selection module, said corrected data unit to the output of said error correcting device when said error detection signal indicates a correctable error; and providing, by said selection module, said received data unit instead of said corrected data unit to the output in response to the error detection signal indicating that an error-free received data unit is detected, and in response to an error being introduced during said error correction processing. 11. The method as claimed in claim 10 , wherein said correction error signal indicates a false correction and said providing a correction error signal from a result of said comparison depending on said error detection signal comprises providing said correction error signal when said error detection information indicates no error and said result indicates a difference between said received data unit and said corrected data unit. 12. The method as claimed in claim 10 , wherein said receiving comprises continuously receiving sequences of data units. 13. The method of claim 10 , further comprising: providing, by said selection module, said received data unit to said output when said error detection signal indicates no error. 14. A data processing system, comprising: at least one error correcting device comprising an input configured to receive one or more data units, an error detection module configured to identify either a presence of one or more errors in a received data unit of the one or more data units, or that the received data unit is error-free, to generate an error detection signal for the received data unit in response to said identifying, the error detection signal to indicate either the presence or one or more errors in the received data unit or that the received data unit is error-free, to perform an error correction processing on the received data unit, and to generate a corrected data unit, and a correction evaluation module configured to perform a comparison of the received data unit with the corrected data unit, and to generate a correction error signal depending on a result of the comparison and the error detection signal; a processing device arranged to receive corrected or received data units from said at least one error correcting device; and a selection module to: receive said error detection signal, said received data unit and said corrected data unit, provide said corrected data unit to the output of said error correcting device when said error detection signal indicates a correctable error, and provide said received data unit instead of said corrected data unit to the output in response to an error-free received data unit being detected, and in response to an error being introduced during said error correction processing performed by said error detection module. 15. The data processing system as claimed in claim 14 , comprising a data source comprising an output connected to provide data units to an input of said at least one error correcting device. 16. The data processing system as claimed in claim 14 , wherein said data processing system is integrated in a single integrated circuit package with at least one die. 17. The data processing system as claimed in claim 14 , wherein the correction error signal indicates a false correction and said correction evaluation module is arranged to provide said correction error signal when said error detection signal indicates no error and said result indicates a difference between said received data unit and said corrected data unit. 18. The data proce
using arrangements adapted for a specific error detection or correction feature · CPC title
by exceeding limits · CPC title
Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers · CPC title
Error or fault reporting or storing · CPC title
by exceeding a time limit, i.e. time-out, e.g. watchdogs · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.