Variable gain amplifier

Patent metadata

Field	Value
Publication number	US-9246459-B2
Application number	US-201414450001-A
Country	US
Kind code	B2
Filing date	Aug 1, 2014
Priority date	May 22, 2012
Publication date	Jan 26, 2016
Grant date	Jan 26, 2016

Abstract

A method may include applying an input differential voltage to input terminals of an amplifier, a first input terminal coupled to a gate of a first transistor and a second input terminal coupled to a gate of a second transistor. The method may also include varying a gain of the amplifier by varying at least one of: a resistance of a first resistor, the first resistor coupled between a source of the first transistor and a source of the second transistor; and a resistance of a second resistor, the second resistor coupled between a source of a third transistor and a source of a fourth transistor; wherein: the third transistor is coupled at its drain to the drain of the first transistor; and the fourth transistor is coupled at its drain to the drain of the second transistor and a gate of the third transistor and coupled at its gate to the drain of the third transistor.

First claim

What is claimed is:

1. A method, comprising:
applying an input differential voltage to input terminals of a variable gain amplifier, the variable gain amplifier comprising a gain stage and an active load stage; and
varying a gain of the variable gain amplifier without altering a common mode output voltage of the variable gain amplifier by varying an effective impedance provided by the active load stage to the gain stage, wherein varying the effective impedance includes source degeneration of the active load stage.

2. The method of claim 1 , wherein varying the gain includes source degeneration of the gain stage.

3. An amplifier, comprising:
a gain stage; and
an active load stage comprising:
a first transistor directly coupled at its drain terminal to the gain stage and to a gate terminal of a second transistor;
the second transistor directly coupled at its drain terminal to the gain stage and to a gate terminal of the first transistor;
a first current source coupled to a source terminal of the first transistor;
a second current source coupled to a source terminal of the second transistor; and
a variable resistor coupled between the source terminal of the first transistor and the source terminal of the second transistor,
wherein a gain of the amplifier is modified without altering a common mode output voltage of the amplifier by:
varying an effective impedance provided by the active load stage to the gain stage.

4. The amplifier of claim 3 , wherein varying the effective impedance includes source degeneration of the active load stage.

5. The amplifier of claim 4 , wherein the gain of the amplifier is modified by source degeneration of the gain stage.

6. The amplifier of claim 4 , wherein the source degeneration of the active load stage includes varying a resistance of the variable resistor.

Assignees

• Fujitsu Ltd

Inventors

• Kao Shuo-Chun
• Nedovic Nikola

Classifications

• H03G3/00 Primary

  Gain control in amplifiers or frequency changers · CPC title

• H03F2203/45374

  the AAC comprising one or more discrete resistors · CPC title

• H03F2203/45702

  the LC comprising two resistors · CPC title

• H03F2003/45008

  Electricity · mapped topic

• H03F2203/45644

  the LC comprising a cross coupling circuit, e.g. comprising two cross-coupled transistors · CPC title