Power amplifiers with push-pull transistors, capacitive coupling for harmonic cancellation, and inductive coupling to provide differential output signals

Patent metadata

Field	Value
Publication number	US-9246451-B2
Application number	US-201414224153-A
Country	US
Kind code	B2
Filing date	Mar 25, 2014
Priority date	Dec 23, 2010
Publication date	Jan 26, 2016
Grant date	Jan 26, 2016

Abstract

A differential power amplifier including a push-pull pair of transistors, a capacitance, a first inductance, and a second inductance. The push-pull pair of transistors includes first and second transistors. The first transistor includes control and output terminals. The second transistor includes input and control terminals. The control terminals of the first and second transistors collectively receive a differential input signal. The output and input terminals collectively provide a differential output signal. The capacitance is connected to the output and input terminals. The first capacitance cancels first harmonics at the output terminal of the first transistor with second harmonics at the input terminal of the second transistor. The first transistor and the first inductance are connected in series between a voltage source and a reference terminal. The second transistor and the second inductance are connected in series between the voltage source and the reference terminal.

First claim

What is claimed is:

1. A differential power amplifier comprising:
a first push-pull pair of transistors including
a first transistor comprising a control terminal and an output terminal, and
a second transistor comprising an input terminal and a control terminal, wherein the control terminal of the first transistor and the control terminal of the second transistor are configured to collectively receive a differential input signal, wherein the output terminal of the first transistor and the input terminal of the second transistor are configured to collectively provide a differential output signal;

a first capacitance connected to (i) the output terminal of the first transistor, and (ii) the input terminal of the second transistor, wherein harmonics at the output terminal of the first transistor combine with harmonics at the input terminal of the second transistor via the first capacitance such that the harmonics at the output terminal of the first transistor and the harmonics at the input terminal of the second transistor cancel;
a first inductance, wherein the first transistor and the first inductance are connected in series between a voltage source and a reference terminal;
a second inductance, wherein the second transistor and the second inductance are connected in series between the voltage source and the reference terminal; and
a second capacitance connected in parallel with the first inductance or the second inductance.

2. The differential power amplifier of claim 1 , further comprising a third capacitance, wherein:
the second capacitance is connected in parallel with the first inductance; and
the third capacitance is connected in parallel with the second inductance.

3. The differential power amplifier of claim 1 , wherein
the first transistor includes an input terminal;
the input terminal of the first transistor and the second inductance are connected to the voltage source;
the second transistor includes an output terminal; and
the output terminal of the second transistor and the first inductance are connected to the reference terminal.

4. A circuit comprising:
a differential power amplifier comprising
a first push-pull pair of transistors including
a first transistor comprising a control terminal and an output terminal, and
a second transistor comprising an input terminal and a control terminal, wherein the control terminal of the first transistor and the control terminal of the second transistor are configured to collectively receive a differential input signal, wherein the output terminal of the first transistor and the input terminal of the second transistor are configured to collectively provide a differential output signal,

a first capacitance connected to (i) the output terminal of the first transistor, and (ii) the input terminal of the second transistor, wherein harmonics at the output terminal of the first transistor combine with harmonics at the input terminal of the second transistor via the first capacitance such that the harmonics at the output terminal of the first transistor and the harmonics at the input terminal of the second transistor cancel,
a first inductance, wherein the first transistor and the first inductance are connected in series between a voltage source and a reference terminal, and
a second inductance, wherein the second transistor and the second inductance are connected in series between the voltage source and the reference terminal, and

a second power amplifier comprising
a differential input configured to receive the differential output signal, and
a differential output configured to output a second differential output signal.

5. The circuit of claim 4 , wherein the second power amplifier comprises a second push-pull pair of transistors.

6. The circuit of claim 5 , further comprising a third inductance and a fourth inductance, wherein:
the second push-pull pair of transistors comprises a third transistor and a fourth transistor;
the second power amplifier comprises a fifth inductance and a sixth inductance, wherein the fifth inductance is connected in series with the fourth transistor, and wherein the sixth inductance is connected in series with the third transistor;
the third inductance is inductively coupled to the first inductance or the fifth inductance; and
the fourth inductance is inductively coupled to the second inductance or the sixth inductance.

7. The circuit of claim 6 , wherein the fifth inductance and the sixth inductance collectively provide the second differential output signal.

8. The circuit of claim 6 , wherein the third inductance and the fourth inductance collectively provide the second differential output signal.

9. The circuit of claim 6 , wherein the third inductance and the fourth inductance are connected in series.

10. The circuit of claim 6 , further comprising a seventh inductance and an eighth inductance, wherein:
the third inductance is inductively coupled to the first inductance;
the fourth inductance is inductively coupled to the second inductance;
the seventh inductance is inductively coupled to the fifth inductance; and
the eighth inductance is inductively coupled to the sixth inductance.

11. The circuit of claim 10 , wherein the third, fourth, seventh and eighth inductances are connected in series.

12. The circuit of claim 6 , wherein:
the third inductance is inductively coupled to the first inductance and the fifth inductance; and
the fourth inductance is inductively coupled to the second inductance and the sixth inductance.

13. A power amplifier comprising:
a first differential amplifier comprising a differential input, a first output terminal and a second output terminal, wherein the differential input is configured to receive a differential input signal, and wherein the first output terminal and the second output terminal are configured to collectively output a first differential output;
a first inductance;
a second inductance, wherein the first inductance and the second inductance are connected in series between the first output terminal and the second output terminal of the first differential amplifier, and wherein the first inductance and the second inductance are connected to each other at a voltage source terminal or a ground reference terminal;
a third inductance inductively coupled to the first inductance;
a fourth inductance inductively coupled to the second inductance, wherein the third inductance and the fourth inductance provide a second differential output;
a second differential amplifier comprising a third output terminal and a fourth output terminal, wherein the third output terminal and the fourth output terminal are not connected to the first output terminal and the second output terminal;
a first capacitance connected between the first output terminal and the second third output terminal, wherein harmonics at the first output terminal combine with harmonics at the third output terminal such that the harmonics at the first output terminal and the harmonics at the third output terminal cancel out each other; and
a second capacitance connected between the second output terminal and the fourth output terminal, wherein harmonics at the second output terminal combine with harmonics at the fourth output terminal such that the harmonics at the second output terminal and the harmonics at the fourth output terminal cancel.

14. The power amplifier of claim 13 , wherein the third inductance and the fourth inductance are connected in series.

15. The power amplifier of claim 13 , further comprising:
a fifth inductance; and
a sixth inductance, wherein the fifth inductance a

Assignees

• Marvell World Trade Ltd

Inventors

• Sutardja Sehat
• Leong Poh Boon
• Song Ping
• Maniam Nuntha Kumar Krishnasamy

Classifications

• H03F2200/537

  A transformer being used as coupling element between two amplifying stages · CPC title

• H03F1/223 Primary

  with MOSFET's · CPC title

• H03F2203/45731

  the LC comprising a transformer · CPC title

• H03F3/26

  Push-pull amplifiers; Phase-splitters therefor (duplicated single-ended push-pull arrangements or phase-splitters therefor H03F3/30) · CPC title

• H03F3/265

  with field-effect transistors only · CPC title