Solid-state imaging device, manufacturing method thereof, and camera with alternately arranged pixel combinations and shared floating diffusion

US9245918B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9245918-B2
Application numberUS-201414586208-A
CountryUS
Kind codeB2
Filing dateDec 30, 2014
Priority dateJul 24, 2009
Publication dateJan 26, 2016
Grant dateJan 26, 2016

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A solid-state imaging device includes a semiconductor substrate; and a pixel unit having a plurality of pixels on the semiconductor substrate, wherein the pixel unit includes first pixel groups having two or more pixels and second pixel groups being different from the first pixel groups, wherein a portion of the pixels in the first pixel groups and a portion of the pixels in the second pixel groups share a floating diffusion element.

First claim

Opening claim text (preview).

What is claimed: 1. A solid-state imaging device, comprising: a pixel unit including a plurality of pixels; wherein the pixel unit includes first pixel groups having two or more pixels and second pixel groups being different from the first pixel groups, wherein a portion of the pixels in the first pixel groups and a portion of the pixels in the second pixel groups share a floating diffusion element, wherein the first pixel groups have first color filters and the second pixel groups have second color filters which are different from the first color filters, and wherein the first color filters are different in size from the second color filters. 2. The solid-state imaging device according to claim 1 , further comprising an amplifying element, wherein a portion of the amplifying element shares the portion of the pixels in the first pixel groups and the portion of the pixels in the second pixel groups. 3. The solid-state imaging device according to claim 1 , further comprising a reset element, wherein a portion of the reset element shares the portion of the pixels in the first pixel groups and the portion of the pixels in the second pixel groups. 4. The solid-state imaging device according to claim 1 , further comprising a select element, wherein a portion of the select element shares the portion of the pixels in the first pixel groups and the portion of the pixels in the second pixel groups. 5. The solid-state imaging device according to claim 1 , wherein respective ones of the plurality of pixels in the pixel unit include a photoelectric conversion element which generates a charge corresponding to an incident light. 6. The solid-state imaging device according to claim 5 , wherein the respective ones of the plurality of pixels in the pixel unit further include a transfer element which transfers the charge from the photoelectric conversion element to the floating diffusion element. 7. The solid-state imaging device according to claim 1 , wherein a lens unit is formed on the semiconductor substrate and includes a plurality of on-chip lenses. 8. The solid-state imaging device according to claim 1 , further comprising a lens unit, wherein the lens unit includes a plurality of on-chip lenses, and the on-chip lenses formed on the first pixel groups are different in size from the on-chip lenses formed on the second pixel groups. 9. The solid-state imaging device according to claim 1 , further comprising a film unit that includes an insulating layer or a light waveguide layer, wherein the film unit is formed between the lens unit and the pixel unit.

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Classifications

  • based on three different wavelength filter elements · CPC title

  • Addressed sensors, e.g. MOS or CMOS sensors · CPC title

  • Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components · CPC title

  • Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

  • Microlenses · CPC title

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What does patent US9245918B2 cover?
A solid-state imaging device includes a semiconductor substrate; and a pixel unit having a plurality of pixels on the semiconductor substrate, wherein the pixel unit includes first pixel groups having two or more pixels and second pixel groups being different from the first pixel groups, wherein a portion of the pixels in the first pixel groups and a portion of the pixels in the second pixel gr…
Who is the assignee on this patent?
Sony Corp
What technology area does this patent fall under?
Primary CPC classification H10F39/8053. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).