Chip resistor and method of producing same

US9245672B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9245672-B2
Application numberUS-201313960749-A
CountryUS
Kind codeB2
Filing dateAug 6, 2013
Priority dateFeb 24, 2011
Publication dateJan 26, 2016
Grant dateJan 26, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An object of the disclosure is to provide a chip resistor without causing the disconnection in atmosphere of sulfidizing gas and without precipitating silver sulfide on its surface. The chip resistor of the present disclosure includes a resistor layer disposed on a top surface of a substrate; a first upper electrode layer disposed at both sides of the resistor layer and being electrically connected to the resistor layer; and a second upper electrode layer disposed on the first upper electrode layer and including between 75% by weight and 85% by weight (inclusive) of silver particles with an average particle diameter ranging from 0.3 um to 2 um, between 1% by weight and 10% by weight (inclusive) of carbon, and a resin.

First claim

Opening claim text (preview).

The invention claimed is: 1. A chip resistor comprising: a substrate having a top surface; a resistor layer disposed on the top surface of the substrate; a pair of first upper electrode layers disposed on the top surface of the substrate and being electrically connected to the resistor layer at both sides of the resistor layer; a pair of second upper electrode layers disposed on the pair of first upper electrode layers and including between 75% by weight and 85% by weight (i…

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What does patent US9245672B2 cover?
An object of the disclosure is to provide a chip resistor without causing the disconnection in atmosphere of sulfidizing gas and without precipitating silver sulfide on its surface. The chip resistor of the present disclosure includes a resistor layer disposed on a top surface of a substrate; a first upper electrode layer disposed at both sides of the resistor layer and being electrically conne…
Who is the assignee on this patent?
Panasonic Corp, Panasonic Ip Man Co Ltd
What technology area does this patent fall under?
Primary CPC classification H01C1/14. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 26 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).