Gate driving circuit and display apparatus having the same

Patent metadata

Field	Value
Publication number	US-9245489-B2
Application number	US-201514625173-A
Country	US
Kind code	B2
Filing date	Feb 18, 2015
Priority date	Aug 22, 2012
Publication date	Jan 26, 2016
Grant date	Jan 26, 2016

Abstract

A display apparatus including a gate driving circuit configured to include a plurality of stages connected to each other one after another. An i-th stage of the stages includes an output transistor and a control part. At least one control transistor included in the control part includes a first control electrode to which a switching control signal is applied, and a second control electrode disposed on a layer different from a layer on which the first control electrode is disposed, and to which a reference voltage is applied.

First claim

What is claimed is:

1. A display apparatus comprising:
a display panel comprising a plurality of gate lines, a plurality of data lines, and a plurality of pixels each connected to a corresponding gate line of the gate lines and a corresponding data line of the data lines;
a data driving circuit configured to apply data signals to the data lines; and
a gate driving circuit comprising a plurality of stages configured to apply gate signals to the gate lines, an i-th stage (i is an integer number equal to or greater than 2) among the stages comprising:
an output transistor comprising a control electrode, an input electrode, and an output electrode, the control electrode connected to a first node configured to receive a control signal from a previous stage of the i-th stage, the input electrode configured to receive a clock signal, and the output electrode configured to output a gate signal of the i-th stage; and
a control transistor comprising an output electrode connected to the first node, a is first control electrode, and a second control electrode disposed on a layer different from a layer on which the first control electrode is disposed,

wherein the first control electrode is configured to receive a switching control signal and the second control electrode is configured to receive a reference voltage having a constant positive voltage level.

2. The display apparatus of claim 1 , wherein the reference voltage is greater than zero (0) volts and equal to or less than 15 volts.

3. The display apparatus of claim 2 , wherein the previous stage is an (i−1)th stage.

4. The display apparatus of claim 2 , wherein the control transistor further comprises a first active layer disposed on the first control electrode, overlapped with the first control electrode, and insulated from the first control electrode,
wherein the input electrode is overlapped with the first active layer and the output electrode is overlapped with the first active layer and spaced apart from the input electrode, and
wherein the input electrode and the output electrode are insulated from the second control electrode.

5. The display apparatus of claim 4 , wherein the input electrode of the control transistor is connected to the first control electrode, and the input electrode of the control transistor and the first control electrode are configured to receive the switching control signal from the (i−1)th stage.

6. The display apparatus of claim 4 , wherein the input electrode of the control transistor is configured to receive a negative voltage or a ground voltage, and the first control electrode is configured to receive the switching control signal from an (i+1)th stage.

7. The display apparatus of claim 4 , wherein each of the plurality of pixels comprises:
a thin film transistor comprising a control electrode connected to the corresponding gate line, a second active layer overlapped with and insulated from the control electrode, an input electrode overlapped with the second active layer, and an output electrode overlapped with the second active layer and spaced apart from the input electrode; and
a liquid crystal capacitor comprising a first electrode electrically connected to the output electrode and a second electrode facing the first electrode, a liquid crystal layer being disposed between the first electrode and the second electrode, and
wherein the first active layer and the second active layer are disposed on the same layer, and the first electrode and the second control electrode are disposed on the same layer.

8. The display apparatus of claim 7 , wherein the first electrode is configured to receive a pixel voltage, the second electrode is configured to receive a common voltage having a level different from the pixel voltage, and the reference voltage has a same level as the common voltage.

9. The display apparatus of claim 7 , wherein each of the plurality of pixels further comprise a storage capacitor connected in parallel with the liquid crystal capacitor, and
wherein the storage capacitor comprises a third electrode and a storage line facing the third electrode, an insulating layer is disposed therebetween, the storage line is configured to receive a storage voltage having a level different from the pixel voltage, and the reference voltage has a same level as the storage voltage.

10. The display apparatus of claim 1 , wherein the i-th stage further comprises a stabilization transistor configured to apply a negative voltage or a ground voltage to the first node in response to a switching control signal from a next stage of the i-th stage.

11. A display panel comprising:
a plurality of gate lines; and
a gate driving circuit comprising a plurality of stages configured to apply gate signals to the gate lines, an i-th stage (i is an integer number equal to or greater than 2) among the stages comprising:
an output transistor comprising a control electrode, an input electrode, and an output electrode, the control electrode connected to a first node configured to receive a control signal from a previous stage of the i-th stage; and
a control transistor comprising an output electrode connected to the first node, a first control electrode and a second control electrode disposed on a layer different from a layer on which the first control electrode is disposed,

wherein the first control electrode is configured to receive a switching control signal and the second control electrode is configured to receive a reference voltage having a constant positive voltage level.

Assignees

• Samsung Display Co Ltd

Inventors

• Han Sang Youn
• Kim Cheolkyu
• Yang Sunghoon
• Jeon Sanghyun

Classifications

• G09G3/3688

  suitable for active matrices only · CPC title

• H03K17/687

  the devices being field-effect transistors · CPC title

• G11C19/28

  using semiconductor elements (G11C19/14, G11C19/36 take precedence) · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2300/0876

  Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes · CPC title