Automatic transaction coarsening

Patent metadata

Field	Value
Publication number	US-9244746-B2
Application number	US-201313956609-A
Country	US
Kind code	B2
Filing date	Aug 1, 2013
Priority date	Aug 1, 2013
Publication date	Jan 26, 2016
Grant date	Jan 26, 2016

Abstract

A processing device comprises an instruction execution unit and track and combing logic to combine a plurality of transactions into a single combined transaction. The track and combine logic comprises a transaction monitoring module to monitor an execution of a plurality of transactions by the instruction execution unit, each of the plurality of transactions comprising a transaction begin instruction, at least one operation instruction and a transaction end instruction. The track and combine logic further comprises a transaction combination module to identify, in view of the monitoring, a subset of the plurality of transactions to combine into a single combined transaction for execution on the processing device and to combine the identified subset of the plurality of transactions into the single combined transaction, the single combined transaction comprising a single transaction begin instruction, a plurality of operation instructions corresponding to the subset of the plurality of transactions and a single transaction end instruction.

First claim

What is claimed is:

1. A processing device comprising:
an instruction execution unit; and
a track and combine logic to combine a plurality of transactions into a single combined transaction, the track and combine logic comprising:
a transaction monitoring module to monitor an execution of the plurality of transactions by the instruction execution unit, each of the plurality of transactions comprising a transaction begin instruction, at least one operation instruction and a transaction end instruction, wherein to monitor the execution, the transaction monitoring module to track a number of occurrences of each of the plurality of transactions and a number of aborts in the execution of each of the plurality of transactions; and
a transaction combination module to identify, in view of the monitoring, a subset of the plurality of transactions to combine into the single combined transaction for execution on the processing device and to combine the identified subset of the plurality of transactions into the single combined transaction, the single combined transaction comprising a single transaction begin instruction, a plurality of operation instructions corresponding to the subset of the plurality of transactions and a single transaction end instruction.

2. The processing device of claim 1 , wherein each of the plurality of transactions comprises a section of code in a computer application program designed to atomically execute on a shared data store.

3. The processing device of claim 1 , wherein to identify the subset of the plurality of transactions to combine into the single combined transaction, the transaction combination module to:
compare the number of occurrences of each of the plurality of transactions to a first threshold; and
compare a ratio of the number of aborts to the number of occurrences of each of the plurality of transactions to a second threshold.

4. The processing device of claim 3 , wherein the transaction combination module further to:
combine the subset of the plurality of transactions into the single combined transaction when the number of occurrences of each of the plurality of transactions is greater than the first threshold and when the ratio of the number of aborts to the number of occurrences of each of the plurality of transactions is less than the second threshold.

5. The processing device of claim 1 , wherein to combine the subset of the plurality of transactions into the single combined transaction, the transaction combination module to ignore each transaction begin instruction and transaction end instruction of the subset of the plurality of transactions except for the single transaction begin instruction and the single transaction end instruction, wherein the single transaction begin instruction comprises the transaction begin instruction of the first transaction in the subset and the single transaction end instruction comprises the transaction end instruction of the last transaction in the subset.

6. The processing device of claim 1 , wherein the subset of the plurality of transactions comprises a number of transactions to reduce overhead associated with the transaction begin instructions and the transaction end instructions and to minimize a likelihood of a conflict with an operation instruction not in the subset of the plurality of transactions.

7. A method comprising:
monitoring, by a processing device, an execution of a plurality of transactions on the processing device, each of the plurality of transactions comprising a transaction begin instruction, at least one operation instruction and a transaction end instruction, wherein the monitoring comprises tracking a number of occurrences of each of the plurality of transactions and a number of aborts in the execution of each of the plurality of transactions;
identifying, in view of the monitoring, a subset of the plurality of transactions to combine into a single combined transaction for execution on the processing device; and
combining, by a track and combine logic in the processing device, the identified subset of the plurality of transactions into the single combined transaction, the single combined transaction comprising a single transaction begin instruction, a plurality of operation instructions corresponding to the subset of the plurality of transactions and a single transaction end instruction.

8. The method of claim 7 , wherein each of the plurality of transactions comprises a section of code in a computer application program designed to atomically execute on a shared data store.

9. The method of claim 7 , wherein identifying the subset of the plurality of transactions to combine into the single combined transaction comprises:
comparing the number of occurrences of each of the plurality of transactions to a first threshold; and
comparing a ratio of the number of aborts to the number of occurrences of each of the plurality of transactions to a second threshold.

10. The method of claim 9 , further comprising:
combining the subset of the plurality of transactions into the single combined transaction when the number of occurrences of each of the plurality of transactions is greater than the first threshold and when the ratio of the number of aborts to the number of occurrences of each of the plurality of transactions is less than the second threshold.

11. The method of claim 7 , wherein combining the subset of the plurality of transactions into the single combined transaction comprises ignoring each transaction begin instruction and transaction end instruction of the subset of the plurality of transactions except for the single transaction begin instruction and the single transaction end instruction, wherein the single transaction begin instruction comprises the transaction begin instruction of the first transaction in the subset and the single transaction end instruction comprises the transaction end instruction of the last transaction in the subset.

12. The method of claim 7 , wherein the subset of the plurality of transactions comprises a number of transactions to reduce overhead associated with the transaction begin instructions and the transaction end instructions and to minimize a likelihood of a conflict with an operation instruction not in the subset of the plurality of transactions.

13. A system comprising:
a memory to store program code comprising a plurality of transactions, each of the plurality of transactions comprising a transaction begin instruction, at least one operation instruction and a transaction end instruction; and
a processing device; communicably coupled to the memory, the processing device comprising a track and combine logic to:
monitor an execution of the plurality of transactions on the processing device, wherein to monitor the execution, the track and combine logic is further to track a number of occurrences of each of the plurality of transactions and a number of aborts in the execution of each of the plurality of transactions;
identify, in view of the monitoring, a subset of the plurality of transactions to combine into a single combined transaction for execution on the processing device; and
combine the identified subset of the plurality of transactions into the single combined transaction, the single combined transaction comprising a single transaction begin instruction, a plurality of operation instructions corresponding to the subset of the plurality of transactions and a single transaction end instruction.

14. The system of claim 13 , wherein each of the plurality of transactions comprises a section of the program code in a computer application program designed to atomically execute on a shared data

Assignees

• Hughes Christopher J
• Yoo Richard M
• Intel Corp

Inventors

• Hughes Christopher J
• Yoo Richard M

Classifications

• G06F9/466 Primary

  Transaction processing · CPC title

• G06F9/526 Primary

  Mutual exclusion algorithms · CPC title

• G06F9/467

  Transactional memory (G06F9/528 takes precedence) · CPC title