Multi-gain adaptive linear processing and gated digital system for use in flow cytometry

Patent metadata

Field	Value
Publication number	US-9243995-B2
Application number	US-201213619845-A
Country	US
Kind code	B2
Filing date	Sep 14, 2012
Priority date	Mar 23, 2007
Publication date	Jan 26, 2016
Grant date	Jan 26, 2016

Abstract

Disclosed is an electronic processing system for a flow cytometer that uses a processing chip that processes data in a parallel architecture on a sample by sample basis and provides for high throughput of data. In addition, multi-gain linear amplifiers are used which are matched using feedback circuits to provide accurate data and high resolution data having high dynamic range.

First claim

The invention claimed is:

1. A method of processing data from a plurality of data channels of a flow cytometer, comprising:
digitizing the data to produce a plurality of channels of digitized data; and
processing the plurality of channels of digitized data in parallel by a processor that performs:
delaying selected individual channels of digitized data of the plurality of channels of digitized data by a plurality of selected time delays to temporarily align the plurality of channels of digitized data;
generating channel triggers from the plurality of channels of digitized data by comparing the plurality of channels of digitized data with thresholds;
selecting a subset of the channel triggers to assist in generating event window signals;
using programmable logic by the processor to further assist in generating the event window signals;
generating digitized data output signals from the plurality of channels of digitized data; and
selecting the digitized data output signals using the event window signals.

2. The method recited in claim 1 , wherein the programmable logic comprises a lookup table.

3. An electronic control system that simultaneously processes a plurality of input data signals to provide high data throughput, comprising:
a plurality of analog-to-digital converters configured to digitize the plurality of input data signals thereby producing a plurality of binary input data signals; and
a processor that simultaneously processes the binary input data signals, the processor comprising:
a plurality of delay circuits that temporally align the binary input data signals;
a plurality of comparator circuits that generate channel triggers by comparing the binary input data signals with predetermined thresholds;
detector circuits that generate binary output data signals from the binary input data signals; and
an event window generator that uses the channel triggers and programmable logic to generate event window signals that select a subset of the binary output data signals.

4. The electronic control system recited in claim 3 , wherein the programmable logic comprises a lookup table.

5. The electronic control system recited in claim 3 , wherein a flow cytometer comprises the electronic control system.

Assignees

• Fox Daniel N
• Thrasher Thomas L
• Beckman Coulter Inc

Inventors

• Fox Daniel N
• Thrasher Thomas L

Classifications

• H04B17/0085

  using test signal generators · CPC title

• G01N15/1429

  Signal processing · CPC title

• G01N2015/1477

  Multiparameters · CPC title

• H04B17/0082

  using service channels; using auxiliary channels · CPC title

• G01N15/147 Primary

  the analysis being performed on a sample stream · CPC title