Power supply noise cancelling circuit and power supply noise cancelling method

US9240797B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9240797-B2
Application numberUS-201514657728-A
CountryUS
Kind codeB2
Filing dateMar 13, 2015
Priority dateMar 14, 2014
Publication dateJan 19, 2016
Grant dateJan 19, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

According to an embodiment, a power supply noise cancelling circuit includes a generator, a first multiplier, a subtractor and a digital-to-analog converter. The generator generates a sine wave signal. The first multiplier multiplies a digital input signal by a digital signal based on the sine wave signal to generate a first digital product signal. The subtractor subtracts a digital signal based on the first digital product signal from the digital input signal to generate a digital difference signal. The digital-to-analog converter performs a digital-to-analog conversion on the digital difference signal to obtain an analog output signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A power supply noise cancelling circuit, comprising: a generator that generates a sine wave signal; a first multiplier that multiplies a digital input signal by a digital signal based on the sine wave signal to generate a first digital product signal; a subtractor that subtracts a digital signal based on the first digital product signal from the digital input signal to generate a digital difference signal; and a digital-to-analog converter that performs a digital-to-analog conversion on the digital difference signal to obtain an analog output signal. 2. The circuit according to claim 1 , further comprising a phase shifter that shifts a phase component of the sine wave signal by a predetermined amount to obtain a phase-adjusted sine wave signal, and wherein the first multiplier multiplies the digital input signal by the phase-adjusted sine wave signal to generate the first digital product signal. 3. The circuit according to claim 1 , further comprising a first variable gain amplifier that amplifies or attenuates the first digital product signal with a first variable gain to obtain an amplitude-adjusted digital product signal, and wherein the subtractor subtracts the amplitude-adjusted digital product signal from the digital input signal to generate the digital difference signal. 4. The circuit according to claim 1 , further comprising: a phase shifter that shifts a phase component of the sine wave signal by a predetermined amount to obtain a phase-adjusted sine wave signal; a first variable gain amplifier that amplifies or attenuates the first digital product signal with a first variable gain to obtain an amplitude-adjusted digital product signal; an analog-to-digital converter that performs an analog-to-digital conversion on the analog output signal to obtain a digital feedback signal; a second multiplier that multiplies the digital feedback signal by the first digital product signal to obtain a second digital product signal; and a first integrator that performs integration on the second digital product signal to obtain a first integral signal, wherein: the first multiplier multiplies the digital input signal by the phase-adjusted sine wave signal to generate the first digital product signal, the subtractor subtracts the amplitude-adjusted digital product signal from the digital input signal to generate the digital difference signal, and the first variable gain is controlled by the first integral signal. 5. The circuit according to claim 1 , further comprising: a first digital amplifier that amplifies or attenuates the first digital product signal with a predetermined gain to obtain a first digital amplified signal; a phase shifter that shifts a phase component of the sine wave signal by π/2 to obtain a cosine wave signal; a second multiplier that multiplies the digital input signal by the cosine wave signal to obtain a second digital product signal; a second digital amplifier that amplifies or attenuates the second digital product signal with a predetermined gain to obtain a second digital amplified signal; an adder that adds the first digital amplified signal and the second digital amplified signal together to obtain a phase-adjusted digital product signal; a digital variable gain amplifier that amplifies or attenuates the phase-adjusted digital product signal with a first variable gain to obtain an amplitude-adjusted digital product signal; an analog-to-digital converter that performs an analog-to-digital conversion on the analog output signal to obtain a digital feedback signal; a third multiplier that multiplies the digital feedback signal by the amplitude-adjusted digital product signal to obtain a third digital product signal; and a first integrator that performs integration on the third digital product signal to obtain a first integral signal, wherein: the subtractor subtracts the amplitude-adjusted digital product signal from the digital input signal to generate the digital difference signal, and the first variable gain is controlled by the first integral signal. 6. The circuit according to claim 1 , further comprising: a first digital amplifier that amplifies or attenuates the first digital product signal with a first variable gain to obtain a first digital amplified signal; a phase shifter that shifts a phase component of the sine wave signal by π/2 to obtain a cosine wave signal; a second multiplier that multiplies the digital input signal by the cosine wave signal to obtain a second digital product signal; a second digital variable gain amplifier that amplifies or attenuates the second digital product signal with a second variable gain to obtain a second digital amplified signal; an adder that adds the first digital amplified signal and the second digital amplified signal together to obtain an adjusted digital product signal; an analog-to-digital converter that performs an analog-to-digital conversion on the analog output signal to obtain a digital feedback signal; a third multiplier that multiplies the digital feedback signal by the first digital product signal to obtain a third digital product signal; a first integrator that performs integration on the third digital product signal to obtain a first integral signal; a fourth multiplier that multiplies the digital feedback signal by the second digital product signal to obtain a fourth digital product signal; and a second integrator that performs integration on the fourth digital product signal to obtain a second integral signal, wherein: the subtractor subtracts the adjusted digital product signal from the digital input signal to generate the digital difference signal, the first variable gain is controlled by the first integral signal, and the second variable gain is controlled by the second integral signal. 7. A power supply noise cancelling circuit, comprising: a first generator that generates a first sine wave signal; a first phase shifter that shifts a phase component of the first sine wave signal to obtain a first phase-adjusted sine wave signal; a first multiplier that multiplies a digital input signal by the first phase-adjusted sine wave signal to generate a first digital product signal; a first variable gain amplifier that amplifies or attenuates the first digital product signal with a first variable gain to obtain a first digital amplified signal; a second generator that generates a second sine wave signal with a frequency component different from a frequency component of the first sine wave signal; a second phase shifter that shifts a phase component of the second sine wave signal by a predetermined amount to obtain a second phase-adjusted sine wave signal; a second multiplier that multiplies the digital input signal by the second phase-adjusted sine wave signal to generate a second digital product signal; a second variable gain amplifier that amplifies or attenuates the second digital product signal with a second variable gain to obtain a second digital amplified signal; an adder that adds the first digital amplified signal and the second digital amplified signal together to obtain a digital summation signal; a subtractor that subtracts the digital summation signal from the digital input signal to generate a digital difference signal; a digital-to-analog converter that performs a digital-to-analog conversion on the digital difference signal to obtain an analog output signal; an analog-to-digital converter that performs an analog-to-digital conversion on the analog output signal to obtain a digital feedback signal; a third multiplier that multiplies the digital feedback signal by the first digital product signal to obtain a third digital product signal; a first integrator that performs integration on the third di

Assignees

Inventors

Classifications

  • of noise {(H03M1/0617 takes precedence)} · CPC title

  • using current sources as quantisation value generators · CPC title

  • with intermediate conversion to phase of sinusoidal or similar periodical signals · CPC title

  • Digital/analogue converters ({H03M1/001 – } H03M1/10 take precedence) · CPC title

  • Analogue/digital/analogue conversion · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9240797B2 cover?
According to an embodiment, a power supply noise cancelling circuit includes a generator, a first multiplier, a subtractor and a digital-to-analog converter. The generator generates a sine wave signal. The first multiplier multiplies a digital input signal by a digital signal based on the sine wave signal to generate a first digital product signal. The subtractor subtracts a digital signal base…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H03M1/0836. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 19 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).