Mitigating disturb effects for non-volatile memory

Patent metadata

Field	Value
Publication number	US-9240235-B2
Application number	US-201314135294-A
Country	US
Kind code	B2
Filing date	Dec 19, 2013
Priority date	Dec 19, 2013
Publication date	Jan 19, 2016
Grant date	Jan 19, 2016

Abstract

A method includes adjusting a counter value to indicate an access operation to a first portion of a non-volatile memory. The access operation is an erase operation or a write operation. The adjusted counter value indicates that a number of access operations to the first portion have been performed since an access operation to a second portion of the non-volatile memory has been performed. The method also includes selectively initiating a remedial action to the second portion in response to a comparison of the number of access operations to a threshold.

First claim

What is claimed is:

1. A data storage device comprising:
a non-volatile memory, wherein a first portion of the non-volatile memory is adjacent to a second portion of the non-volatile memory; and
a controller configured to adjust a counter value to indicate a count of access operations directed to the first portion, wherein the each access operation changes a logical value of at least one memory cell of the first portion, and wherein the adjusted counter value indicates a number of the access operations to the first portion that have been performed since an access operation to the second portion has been performed, and
wherein the controller is configured to selectively initiate a remedial action to the second portion in response to a comparison of the number of the access operations to a threshold.

2. The data storage device of claim 1 , wherein the non-volatile memory includes a resistive random access memory (ReRAM).

3. The data storage device of claim 1 , wherein the first portion includes a first block of the non-volatile memory, and wherein the second portion includes a second block of the non-volatile memory that is adjacent to the first block.

4. The data storage device of claim 1 , further comprising a first counter and a second counter corresponding to the first portion and a first counter and a second counter corresponding to the second portion, wherein the controller is configured to increment the first counter corresponding to the second portion in response to the access operation to the first portion, and wherein the controller is configured to reset the first counter and the second counter corresponding to the first portion in response to the access operation to the first portion.

5. The data storage device of claim 1 , wherein the counter value indicates a most recently accessed one of the first portion or the second portion and further indicates a count of accesses to the most recently accessed one of the first portion or the second portion relative to the other one of the first portion or the second portion.

6. The data storage device of claim 5 , wherein the count of accesses indicates a number of accesses to the most recently accessed one of the first portion or the second portion since the other one of the first portion or the second portion was accessed.

7. The data storage device of claim 6 , wherein the counter value includes a sign and a magnitude, wherein the sign being negative indicates that the first portion is the most recently accessed portion, wherein the sign being positive indicates that the second portion is the most recently accessed portion, and wherein the controller is configured to adjust the counter value in response to the access operation by:
if the sign indicates that the first portion is the most recently accessed portion, incrementing the magnitude of the counter value without changing the sign; and
if the sign indicates that the second portion is the most recently accessed portion, resetting the magnitude and changing the sign.

8. The data storage device of claim 5 , further comprising:
a set of counters that correspond to pairs of adjacent blocks of the non-volatile memory; and
a reference counter configured to track a number of accesses to a particular block of the non-volatile memory, wherein the controller is configured to use the set of counters and the reference counter to determine program/erase counts of blocks of the non-volatile memory.

9. The data storage device of claim 8 , wherein the controller is configured to determine candidates for a wear leveling operation based on counter values of the set of counters and of the reference counter.

10. The data storage device of claim 1 , wherein the remedial action is associated with a data move operation of data stored in the non-volatile memory.

11. The data storage device of claim 10 , wherein the data move operation includes moving data from the second portion to another portion of the non-volatile memory, and wherein the controller is configured to adjust the counter value and to perform the remedial action prior to performing the access operation.

12. The data storage device of claim 10 , wherein the remedial action includes scheduling the data move operation, and wherein the controller is configured to perform the remedial action after performing the access operation.

13. The data storage device of claim 10 , wherein the data move operation is associated with a garbage collection operation, wherein the threshold has a first threshold value, and wherein the remedial action includes at least one of scheduling the first portion for the garbage collection operation or lowering a priority of the second portion to be selected for the garbage collection operation.

14. The data storage device of claim 13 , wherein the threshold has a second threshold value that is greater than the first threshold value, and wherein the remedial action includes increasing a priority of the first portion for a data move operation from the first portion to another portion of the non-volatile memory.

15. The data storage device of claim 14 , wherein the threshold has a third threshold value that is greater than the second threshold value, and wherein the remedial action includes performing the data move operation.

16. The data storage device of claim 10 , wherein the remedial action includes generating an estimated error rate of data in the second portion, and wherein the data move operation includes refreshing the data in the second portion in response to the estimated error rate exceeding an error threshold.

17. The data storage device of claim 10 , wherein the remedial action includes refreshing data in the second portion by:
reading the data from a location in the second portion;
performing an erase operation at the location in the second portion; and
programming an error-corrected version of the data to the location in the second portion.

18. The data storage device of claim 10 , wherein the remedial action includes refreshing data in the second portion by:
reading first data from a first location in the second portion;
programming an error-corrected version of second data to the first location, wherein the second data is read from a second location in the second portion; and
programming an error-corrected version of the first data to a third location in the second portion.

19. A device comprising:
a non-volatile memory including a first portion and a second portion; and
a controller configured to, after initializing a counter in response to an operation directed to the second portion, adjust the counter based on accesses to the first portion, wherein each of the accesses is an erase or a write, and wherein the counter indicates a number of the accesses that have occurred since the operation, and to initiate a remedial action to the second portion based on a comparison of the number of the accesses to a threshold.

20. The device of claim 10 , wherein a logical value of at least one memory cell of the second portion is changed in response to the operation, and wherein a logical value of at least one memory cell of the first portion is changed in response to each of the accesses, and further comprising:
a memory die into which the non-volatile memory and the controller are integrated.

21. The device of claim 19 , wherein the non-volatile memory includes a resistive random access memory (ReRAM).

22. The device of claim 19 , wherein the first portion includes a first block of the non-vol

Assignees

• Sandisk Technologies Inc

Inventors

• Alrod Idan
• Sharon Eran
• Liu Tz-Yi
• Yan Tianhong
• Lasser Menahem

Classifications

• G11C13/0035

  Evaluating degradation, retention or wearout, e.g. by counting writing cycles · CPC title

• G11C13/0069

  Writing or programming circuits or methods · CPC title

• G11C13/0033 Primary

  Disturbance prevention or evaluation; Refreshing of disturbed memory data · CPC title