Method, computer system and control device for reducing power consumption
US-9128711-B2 · Sep 8, 2015 · US
US9239609B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9239609-B2 |
| Application number | US-201314057277-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 18, 2013 |
| Priority date | Sep 2, 2013 |
| Publication date | Jan 19, 2016 |
| Grant date | Jan 19, 2016 |
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An electronic apparatus is provided. The electronic apparatus includes a serial advanced technology attachment (SATA) physical layer, a clock generator and a control unit. The SATA physical layer is configured to provide connection with an SATA device and perform data transmission with the SATA device is performed at a first clock frequency. The clock generator is configured to provide a clock signal having the first clock frequency to the SATA physical layer. When at least one specific event is detected by the control unit, the control unit controls the clock generator to provide the clock signal having a second clock frequency to the SATA physical layer, so that the SATA physical layer performs data transmission with the SATA device at the second clock frequency. The second clock frequency is lower than the first clock frequency.
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What is claimed is: 1. An electronic apparatus, comprising a serial advanced technology attachment (SATA) physical layer, configured to provide connection with an SATA device for building a transmission link, wherein the SATA physical layer performs data transmission with the SATA device at a first clock frequency; a clock generator, configured to provide a clock signal having the first clock frequency to the SATA physical layer; and a control unit, wherein after the transmiss…
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