Computing device power state transitions

Patent metadata

Field	Value
Publication number	US-9239605-B1
Application number	US-201113079526-A
Country	US
Kind code	B1
Filing date	Apr 4, 2011
Priority date	Apr 4, 2011
Publication date	Jan 19, 2016
Grant date	Jan 19, 2016

Abstract

Methods and apparatus for scheduling and controlling power management activities are disclosed. An example method includes automatically scheduling a wake-up alarm for a computing device and transitioning the computing device from an active power state to a first low power state. The example method also includes, in response to occurrence of the automatically scheduled wake-up alarm, transitioning the computing device from the first low power state to the active power state and transitioning the computing device from the active power state to a second low power state, where the second low power state is a lower power state than the first low power state.

First claim

What is claimed is:

1. A non-transitory recordable storage medium having recorded and stored thereon instructions that, when executed by a computing device, cause the computing device to:
obtain a reading indicating a charge level of a battery while the computing device is operating in an active power state;
determine a threshold battery charge capacity based on the reading;
automatically schedule a wake-up alarm for the computing device, the wake-up alarm occurring when a battery charge capacity falls below the threshold battery charge capacity;
transition the computing device from the active power state to a first low power state; and
in response to occurrence of the wake-up alarm:
transition the computing device from the first low power state to a second low power state, wherein the second low power state is a lower power state than the first low power state, and wherein the transitioning occurs without transitioning the computing device to the active power state before transitioning the computing device to the second low power state.

2. The non-transitory recordable storage medium of claim 1 , wherein the active power state is a battery power operating state.

3. The non-transitory recordable storage medium of claim 1 , wherein the first low power state is a suspend-to-random-access-memory (RAM) state and the second low power state is one of a suspend-to-disk state and a power-off state, and wherein transitioning the computing device from the active power state to the first low power state includes saving operating-state information for the computing device to random-access-memory (RAM) and to non-volatile memory.

4. The non-transitory recordable storage medium of claim 1 , wherein the first low power state is a suspend-to-disk state and the second low power state is a power-off state, and wherein transitioning the computing device from the active power state to the first low power state includes saving operating-state information for the computing device to random-access-memory (RAM) and to non-volatile memory.

5. The non-transitory recordable storage medium of claim 1 , wherein transitioning from the active power state to the first low power state comprises saving, to random-access-memory (RAM) and to non-volatile memory, operating state information of the computing device.

6. The non-transitory recordable storage medium of claim 1 , wherein the threshold battery charge capacity is a fixed percentage below the charge level of the battery.

7. A computer-implemented method comprising:
obtaining, by a computing device, a reading indicating a charge level of a battery while the computing device is operating in an active power state;
determining, by the computing device, a threshold battery charge capacity based on the reading;
automatically scheduling a wake-up alarm for the computing device, the wake-up alarm occurring when a battery charge capacity falls below the threshold battery charge capacity;
transitioning the computing device from the active power state to a first low power state; and
in response to occurrence of the wake-up alarm:
transitioning the computing device from the first low power state to a second low power state, wherein the second low power state is a lower power state than the first low power state, and wherein the transitioning occurs without transitioning the computing device to the active power state before transitioning the computing device to the second low power state.

8. The computer-implemented method of claim 7 , wherein the active power state is a battery power operating state.

9. The computer-implemented method of claim 7 , wherein the first low power state is a suspend-to-random-access-memory (RAM) state and the second low power state is one of a suspend-to-disk state and a power-off state, and wherein transitioning the computing device from the active power state to the first low power state includes saving operating-state information for the computing device to random-access-memory (RAM) and to non-volatile memory.

10. The computer-implemented method of claim 7 , wherein the first low power state is a suspend-to-disk state and the second low power state is a power-off state, and wherein transitioning the computing device from the active power state to the first low power state includes saving operating-state information for the computing device to random-access-memory (RAM) and to non-volatile memory.

11. The computer-implemented method of claim 7 , wherein transitioning from the active power state to the first low power state comprises saving, to random-access-memory (RAM) and to non-volatile memory, operating state information of the computing device.

12. The computer-implemented method of claim 7 , wherein the threshold battery charge capacity is a fixed percentage below the charge level of the battery.

Assignees

• Nanda Sameer
• Cairns Ryan
• Tabone Ryan
• Google Inc

Inventors

• Nanda Sameer
• Cairns Ryan
• Tabone Ryan

Classifications

• G06F1/3212 Primary

  Monitoring battery levels, e.g. power saving mode being initiated when battery voltage goes below a certain level · CPC title

• G06F1/3203 Primary

  Power management, i.e. event-based initiation of a power-saving mode · CPC title

• G06F1/3296

  by lowering the supply or operating voltage · CPC title

• Y02D10/00

  Energy efficient computing, e.g. low power processors, power management or thermal management · CPC title

• G06F1/324

  by lowering clock frequency · CPC title