System and method for low distortion capacitive signal source amplifier

US9236837B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9236837-B2
Application numberUS-201113217890-A
CountryUS
Kind codeB2
Filing dateAug 25, 2011
Priority dateAug 25, 2011
Publication dateJan 12, 2016
Grant dateJan 12, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to the detected peak voltage.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: amplifying a signal provided by a capacitive signal source to form an amplified signal; detecting a peak voltage of a portion of the amplified signal having a frequency higher than a lower corner frequency; adjusting a controllable impedance of an attenuator coupled to an output of the capacitive signal source in response to detecting the peak voltage of the portion of the amplified signal having the frequency higher than the lower corner frequency, the controllable impedance being adjusted to a value inversely proportional to the detected peak voltage; and comparing the detected peak voltage to a predetermined threshold, wherein adjusting the controllable impedance comprises decreasing the controllable impedance at a first rate if the detected peak voltage exceeds the predetermined threshold, increasing the controllable impedance at a second rate if detected peak voltage does not exceed the predetermined threshold, wherein the first rate is greater than the second rate. 2. The method of claim 1 , wherein increasing the controllable impedance comprises increasing the controllable impedance up to a maximum value in a plurality of steps. 3. The method of claim 1 , wherein adjusting the controllable impedance comprises adjusting a capacitance coupled to the output of the capacitive signal source. 4. The method of claim 3 , wherein the adjusting the capacitance comprises adjusting a capacitance of a capacitor array, adjusting the capacitance of the capacitor array coupling and decoupling capacitors to and from the output of the capacitive signal source. 5. The method of claim 1 , wherein adjusting the controllable impedance comprises adjusting a controllable resistance coupled to the output of the capacitive signal source. 6. The method of claim 1 , further comprising: detecting a zero crossing of the signal provided by the capacitive signal source; and adjusting the controllable impedance comprises adjusting the controllable impedance when a zero crossing is detected. 7. The method of claim 1 , wherein: the capacitive signal source comprises a MEMS microphone; and the adjustable impedance is controlled such that a total harmonic distortion of the amplified signal is less than 10% for a 140 dBSPL acoustic input to the MEMS microphone. 8. The method of claim 1 , wherein: the capacitive signal source comprises a MEMS microphone; and the method further comprises biasing the MEMS microphone. 9. A system for amplifying a signal provided by a capacitive signal source, the system comprising: a signal amplifier comprising an input node configured to be coupled to the capacitive signal source; a controllable attenuation circuit coupled to the input node of the signal amplifier, the controllable attenuation circuit configured to provide a controllable input impedance at the input node of the signal amplifier; a signal detection circuit coupled to an output of the signal amplifier, the signal detection circuit configured to detect peak signal values of a portion of a signal at the output of the signal amplifier having a frequency higher than a lower corner frequency; and a control circuit coupled between the signal detection circuit and the controllable attenuation circuit, the control circuit configured to adjust the controllable attenuation circuit in response to changes in detected peak signal values of the portion of the signal at the output of the signal amplifier having the frequency higher than the lower corner frequency, wherein the control circuit is further configured to command the controllable attenuation circuit to decrease the input impedance if the signal detection circuit detects a peak signal level greater than a threshold and increase the input impedance up to a maximum value in several steps if the signal detection circuit does not detect a peak signal level greater than the threshold, the control circuit commands the controllable attenuation circuit to decrease the input impedance at a first rate and increase the input impedance at a second rate, and the first rate is greater than the second rate. 10. The system of claim 9 , wherein the signal detection circuit is configured to detect a positive peak signal value and a negative peak signal value. 11. The system of claim 9 , wherein: the signal detection circuit is further configured to detect a zero crossing of a signal at the output of the signal amplifier; and the control circuit is further configured to adjust the controllable attenuation circuit when the signal detection circuit detects a zero crossing. 12. The system of claim 9 , wherein the controllable attenuation circuit comprises a selectable capacitor array coupled to the input node of the signal amplifier. 13. The system of claim 9 , wherein the controllable attenuation circuit comprises an adjustable resistance coupled to the input node of the signal amplifier. 14. The system of claim 9 , wherein the capacitive signal source comprises a MEMS microphone. 15. The system of claim 9 , wherein the portion of the signal at the output of the signal amplifier is an audio signal. 16. The system of claim 9 , wherein the controllable attenuation circuit comprises an adjustable high-pass network. 17. The system of claim 16 , wherein the control circuit is further configured to increase a lower corner frequency of the adjustable high-pass network for a predetermined period of time, and then decrease the lower corner frequency after the predetermined period of time. 18. The method of claim 1 , wherein the amplifier signal comprises an audio signal. 19. The method of claim 1 , wherein adjusting the controllable impedance comprises adjusting an adjustable high-pass network coupled to the output of the capacitive signal source. 20. The method of claim 19 , wherein adjusting the adjustable high-pass network comprises adjusting a variable resistance. 21. The method of claim 19 , wherein adjusting the controllable impedance further comprises increasing a lower corner frequency of the adjustable high-pass network for a predetermined period of time, and then decreasing the lower corner frequency after the predetermined period of time.

Assignees

Inventors

Classifications

  • A variable capacitor being added in the input circuit, e.g. base, gate, of an amplifier stage · CPC title

  • H03F1/56Primary

    Modifications of input or output impedances, not otherwise provided for · CPC title

  • the input of an amplifier can be attenuated by a continuously controlled transistor attenuator · CPC title

  • in integrated circuits · CPC title

  • Modifications of amplifiers to reduce non-linear distortion (by negative feedback H03F1/34) · CPC title

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What does patent US9236837B2 cover?
According to an embodiment, a method includes amplifying a signal provided by a capacitive signal source to form an amplified signal, detecting a peak voltage of the amplified signal, and adjusting a controllable impedance coupled to an output of the capacitive signal source in response to detecting the peak voltage. The controllable impedance is adjusted to a value inversely proportional to th…
Who is the assignee on this patent?
Kropfitsch Michael, Ceballos Jose Luis, Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H03F1/56. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).