High mobility field effect transistor with ZN containing active layer, display device, sensor, and method of manufacturing field effect transistor

US9236491B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9236491-B2
Application numberUS-201313967065-A
CountryUS
Kind codeB2
Filing dateAug 14, 2013
Priority dateMar 14, 2011
Publication dateJan 12, 2016
Grant dateJan 12, 2016

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A field effect transistor including: a gate insulating film; an oxide semiconductor layer that serves as an active layer and whose main structural elements are Sn, Zn and O, or Sn, Ga, Zn and O; and an oxide intermediate layer that is disposed between the gate insulating film and the oxide semiconductor layer, and whose resistivity is higher than that of the oxide semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A field effect transistor comprising: a gate insulating film; an oxide semiconductor layer that serves as an active layer and whose structural elements are Sn, Zn and O, or Sn, Ga, Zn and O; and an oxide intermediate layer that is disposed between the gate insulating film and the oxide semiconductor layer and whose structural elements are In, Ga, Zn, and O, and whose resistivity is higher than that of the oxide semiconductor layer, wherein, in a case in which an element composition ratio of the oxide semiconductor layer is Sn:Ga:Zn =a:b:c, the element composition ratio satisfies a+b=2, and 1≦a≦2, and 1≦c≦11/2,and c≧−7b/4+11/4. 2. The field effect transistor of claim 1 , wherein main structural elements of the oxide semiconductor layer are Sn, Ga, Zn and O. 3. The field effect transistor of claim 1 , wherein the oxide semiconductor layer is amorphous. 4. The field effect transistor of claim 1 , wherein a resistivity of the oxide semiconductor layer is greater than or equal to 1 Ωcm and less than or equal to 1×10 6 Ωcm. 5. The field effect transistor of claim 1 , wherein a film thickness of the oxide intermediate layer is greater than or equal to 1nm and less than or equal to 50 nm. 6. A display device comprising the field effect transistor of claim 1 . 7. A sensor comprising the field effect transistor of claim 1 . 8. A method of fabricating a field effect transistor comprising, in order: a first step of film-forming, on a gate insulating film that is formed on a substrate, an oxide intermediate layer whose main structural elements are In, Ga, Zn and O; a second step of film-forming, on the oxide intermediate layer, an oxide semiconductor layer whose main structural elements are Sn, Zn and O, or Sn, Ga, Zn and O, and that, in a case in which an element composition ratio of the structural elements is Sn:Ga:Zn =a:b:c, the element composition ratio satisfies a+b=2, and 1≦a≦2, and 1≦c≦11/2, and c≧−7b/4+11/4; and a third step of carrying out a heat treatment at greater than or equal to 100° C. and less than 300° C. 9. The method of fabricating a field effect transistor of claim 8 , wherein the oxide semiconductor layer and the oxide intermediate layer are film-formed by sputtering. 10. A method of fabricating a field effect transistor comprising: a first step of film-forming, on a substrate, an oxide semiconductor layer whose main structural elements are Sn, Zn and O, or Sn, Ga, Zn and O, and that, in a case in which an element composition ratio of the structural elements is Sn:Ga:Zn =a:b:c, the element composition ratio satisfies a+b=2, and 1≦a≦2, and 1≦c≦11/2, and c≧−7b/4+11/4; a second step of film forming, on the oxide semiconductor layer, an oxide intermediate layer whose main structural elements are In, Ga, Zn and O; a third step of forming a gate insulating film on the oxide intermediate layer; and a fourth step of, after the second step or after the third step, carrying out a heat treatment at greater than or equal to 100° C. and less than 300° C. 11. The method of fabricating a field effect transistor of claim 10 , wherein the oxide semiconductor layer and the oxide intermediate layer are film-formed by sputtering.

Assignees

Inventors

Classifications

  • characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

  • Amorphous oxide semiconductors · CPC title

  • Subject matter not provided for in other groups of this subclass · CPC title

  • X-ray, gamma-ray or corpuscular radiation imagers · CPC title

  • Integrated devices · CPC title

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Frequently asked questions

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What does patent US9236491B2 cover?
A field effect transistor including: a gate insulating film; an oxide semiconductor layer that serves as an active layer and whose main structural elements are Sn, Zn and O, or Sn, Ga, Zn and O; and an oxide intermediate layer that is disposed between the gate insulating film and the oxide semiconductor layer, and whose resistivity is higher than that of the oxide semiconductor layer.
Who is the assignee on this patent?
Fujifilm Corp
What technology area does this patent fall under?
Primary CPC classification H10D30/6704. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).