Nanoscale switching device
US-9040948-B2 · May 26, 2015 · US
US9236473B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9236473-B2 |
| Application number | US-201414277134-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 14, 2014 |
| Priority date | Feb 15, 2010 |
| Publication date | Jan 12, 2016 |
| Grant date | Jan 12, 2016 |
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A memcapacitor device includes a pair of opposing conductive electrodes. A semiconductive material including mobile dopants within a dielectric and a mobile dopant barrier dielectric material are received between the pair of opposing conductive electrodes. The semiconductive material and the barrier dielectric material are of different composition relative one another which is at least characterized by at least one different atomic element. One of the semiconductive material and the barrier dielectric material is closer to one of the pair of electrodes than is the other of the semiconductive material and the barrier dielectric material. The other of the semiconductive material and the barrier dielectric material is closer to the other of the pair of electrodes than is the one of the semiconductive material and the barrier dielectric material. Other implementations are disclosed, including field effect transistors, memory arrays, and methods.
Opening claim text (preview).
The invention claimed is: 1. A field effect transistor device capable of being repeatedly programmed to at least two different static threshold voltage states, comprising: a pair of source/drain regions, a channel region between the pair of source/drain regions, and a gate construction operably proximate the channel region; and the gate construction comprising a conductive gate electrode and comprising a semiconductive material comprising mobile dopants within a dielectric and comprising a mobile dopant barrier dielectric material received between the conductive gate electrode and the channel region, the mobile dopant barrier dielectric material being closer to the channel region than to the conductive gate electrode, the semiconductive material that comprises mobile dopants within a dielectric being closer to the conductive gate electrode than to the channel region, the mobile dopant barrier dielectric material comprising at least one of ZrO 2 , SiO 2 , Si 3 N 4 , GeN, and SrTiO 3 . 2. The device of claim 1 wherein the mobile dopant barrier dielectric material comprises ZrO 2 . 3. The device of claim 1 wherein the mobile dopant barrier dielectric material comprises SiO 2 . 4. The device of claim 1 wherein the mobile dopant barrier dielectric material comprises Si 3 N 4 . 5. The device of claim 1 wherein the mobile dopant barrier dielectric material comprises GeN. 6. The device of claim 1 wherein the mobile dopant barrier dielectric material comprises SrTiO 3 . 7. A field effect transistor device capable of being repeatedly programmed to at least two different static threshold voltage states, comprising: a pair of source/drain regions, a channel region between the pair of source/drain regions, and a gate construction operably proximate the channel region; and the gate construction comprising a conductive gate electrode and comprising a semiconductive material comprising mobile dopants within a dielectric and comprising a mobile dopant barrier dielectric material received between the conductive gate electrode and the channel region, the mobile dopant barrier dielectric material being closer to the channel region than to the conductive gate electrode, the semiconductive material that comprises mobile dopants within a dielectric being closer to the conductive gate electrode than to the channel region, the semiconductive material that comprises mobile dopants within a dielectric and the mobile dopant barrier dielectric material being in physical touching contact with one another. 8. The device of claim 7 wherein no other material is received between the pair of opposing conductive electrodes but for the semiconductive material that comprises mobile dopants within a dielectric and the mobile dopant barrier dielectric material. 9. A field effect transistor device capable of being repeatedly programmed to at least two different static threshold voltage states, comprising: a pair of source/drain regions, a channel region between the pair of source/drain regions, and a gate construction operably proximate the channel region; and the gate construction comprising a conductive gate electrode and comprising: a crystalline semiconductive metal-containing mass received between the conductive gate electrode and the channel region and that is overall stoichiometrically cation deficient to form mobile cation vacancies in a space lattice; and a barrier dielectric material received between the conductive gate electrode and the channel region and in physical touching contact with the crystalline semiconductive metal-containing mass and that is impervious to movement of the mobile cation vacancies from said mass into the barrier dielectric material, the semiconductive mass and the barrier dielectric material being of different composition relative one another which is at least characterized by at least one different atomic element, the barrier dielectric material being closer to the channel region than to the conductive gate electrode, the semiconductive mass being closer to the conductive gate electrode than to the channel region. 10. A field effect transistor device capable of being repeatedly programmed to at least two different static threshold voltage states, comprising: a pair of source/drain regions, a channel region between the pair of source/drain regions, and a gate construction operably proximate the channel region; and the gate construction comprising a conductive gate electrode and comprising: a crystalline semiconductive metal oxide mass received between the conductive gate electrode and the channel region and that is overall stoichiometrically oxygen atom deficient to form mobile oxygen vacancies in a space lattice; and a barrier dielectric material received between the conductive gate electrode and the channel region and in physical touching contact with the crystalline semiconductive metal oxide mass and that is impervious to movement of the mobile oxygen vacancies from said mass into the barrier dielectric material, the semiconductive mass and the barrier dielectric material being of different composition relative one another which is at least characterized by at least one different atomic element, the barrier dielectric material being closer to the channel region than to the conductive gate electrode, the semiconductive mass being closer to the conductive gate electrode than to the channel region. 11. The device of claim 10 wherein the barrier dielectric material comprises a metal oxide. 12. The device of claim 11 wherein a metal of the metal oxide of the barrier dielectric material is different from a metal of the metal oxide mass. 13. The device of claim 12 wherein the barrier dielectric material comprises ZrO 2 and the crystalline semiconductive metal oxide mass comprises a combination of TiO 2 and TiO 2-x . 14. The device of claim 10 wherein the barrier dielectric material consists essentially of stoichiometric metal oxide. 15. The device of claim 14 wherein a metal of the stoichiometric metal oxide is different from a metal of the metal oxide mass. 16. The device of claim 15 wherein the stoichiometric metal oxide comprises ZrO 2 and the crystalline semiconductive metal oxide mass comprises a combination of TiO 2 and TiO 2-x in at least one programmed state. 17. The method of claim 16 wherein the stoichiometric metal oxide consists essentially of ZrO 2 .
Combinations of field-effect devices and capacitor only · CPC title
Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used · CPC title
Structure wherein the resistive material being in a transistor, e.g. gate · CPC title
Structure including a barrier layer preventing or limiting migration, diffusion of ions or charges or formation of electrolytes near an electrode · CPC title
Writing or programming circuits or methods · CPC title
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