Pointer detection apparatus and pointer detection method

Patent metadata

Field	Value
Publication number	US-9235288-B2
Application number	US-201113302878-A
Country	US
Kind code	B2
Filing date	Nov 22, 2011
Priority date	Dec 8, 2010
Publication date	Jan 12, 2016
Grant date	Jan 12, 2016

Abstract

A pointer detection apparatus includes a conductor pattern formed of intersecting first and second conductors. A signal supplying circuit generates transmission signals each comprised of a first code and a second code having an equal code length and having a predetermined relationship to each other, and supplies the generated transmission signals to the first conductors. A signal detection circuit is connected to the second conductors and detects reception signals, at least one of which corresponds to a variation of capacitance between the conductor pattern and a pointer. A correlation arithmetic operation circuit calculates, for each of the reception signals, first and second correlation values between the reception signal and first and second correlation value arithmetic operation signals corresponding to the first and second codes, respectively. A synthesis circuit calculates, for each pair of the first and second correlation values, a synthesis correlation value, based on which the pointer is detected.

First claim

What is claimed is:

1. A pointer detection apparatus, comprising:
a conductor pattern including a plurality of first conductors disposed in a first direction and a plurality of second conductors disposed in a second direction that crosses the first direction;
a signal supplying circuit configured to generate transmission signals each comprised of a first complementary code and a second complementary code in a time series, and to supply the generated transmission signals to the plurality of first conductors, wherein the first and second complementary codes that form one transmission signal are complementary codes generated based on a pair of seed codes A and B, wherein the first complementary code includes A & B end to end and the second complementary code includes A & B end to end, wherein & means that B or B is combined with A to form a code length of A plus B or A plus B ;
a signal detection circuit connected to the plurality of second conductors and configured to detect reception signals, at least one of which corresponds to a variation of capacitance between said conductor pattern and a pointer;
a correlation arithmetic operation circuit configured to calculate, for each of the reception signals detected by said signal detection circuit, a first correlation value between the reception signal and a first correlation value arithmetic operation signal corresponding to the first complementary code and a second correlation value between the reception signal and a second correlation value arithmetic operation signal corresponding to the second complementary code; and
a synthesis circuit configured to calculate, for each pair of the first and second correlation values, a synthesis correlation value by adding the pair of first and second correlation values calculated by said correlation arithmetic operation circuit and canceling ghost signal components having opposite polarities in the pair of first and second correlation values;
wherein the pointer detection apparatus is configured to detect the pointer based on the synthesis correlation values calculated by said synthesis circuit.

2. The pointer detection apparatus according to claim 1 , wherein said signal supplying circuit exchanges allocations of bits between the first complementary code and the second complementary code, each code comprising a plurality of bits, and then outputs resulting codes with their bit allocations having been exchanged.

3. The pointer detection apparatus according to claim 1 , wherein said signal supplying circuit outputs the second complementary code continuously to the first complementary code such that the first bit of the second complementary code is concatenated to the last bit of the first complementary code.

4. The pointer detection apparatus according to claim 1 , wherein said signal supplying circuit exchanges allocations of bits between the first complementary code and the second complementary code, each comprising a plurality of bits, in a unit of a predetermined number of bits, and then outputs resulting codes with their bit allocations having been exchanged.

5. A pointer detection method for detecting a position pointed to by a pointer on a conductor pattern formed of a plurality of first conductors disposed in a first direction and a plurality of second conductors disposed in a second direction, which crosses the first direction, the method comprising:
generating transmission signals each comprised of a first complementary code and a second complementary code in a time series that are complementary codes generated based on a pair of seed codes A and B, the first complementary code including A & B end to end and the second complementary code including A & B end to end, wherein & means that B or B is combined with A to form a code length of A plus B or A plus B , and supplying the generated transmission signals to the plurality of first conductors;
detecting reception signals from the plurality of second conductors, at least one of the reception signals corresponding to a variation of capacitance between the conductor pattern and the pointer;
calculating, for each of the detected reception signals, a first correlation value between the detected reception signal and a first correlation value arithmetic operation signal corresponding to the first complementary code, and a second correlation value between the detected reception signal and a second correlation value arithmetic operation signal corresponding to the second complementary code;
calculating, for each pair of the first and second correlation values, a synthesis correlation value by adding the calculated pair of first and second correlation values and canceling ghost signal components having opposite polarities in the pair of first and second correlation values; and
detecting the pointer based on the calculated synthesis correlation values.

6. The pointer detection method according to claim 5 , wherein said pair of seed codes is selected from a group consisting of a pair of 2-bit seed codes, a pair of 10-bit seed codes, and a pair of 26-bit seed codes.

7. The pointer detection method according to claim 6 , wherein the pair of 2-bit seed codes, A=[1, 1] and B=[1, −1], are used, to generate the first complementary code and the second complementary code of 2 n bit length each, which together form one transmission signal of 2×2 n bit length, wherein n is an integer greater than 1.

8. The pointer detection method according to claim 7 , wherein the first complementary code based on the pair of 2-bit seed codes is A 2 n =A 2 n-1 & B 2 n-1 and the second complementary code based on the pair of 2-bit seed codes is B 2 n =A 2 n-1 & B 2 n-1 wherein a numerical symbol following A and B indicates a bit length of the first complementary code and the second complementary code, respectively.

9. The pointer detection method according to claim 6 , wherein the pair of 10-bit seed codes are used to generate the first complementary code and the second complementary code of 5×2 n bit length each, which together form one transmission signal of 10×2 n bit length, wherein n is an integer greater than 1.

10. The pointer detection method according to claim 6 , wherein the pair of 26-bit seed codes are used to generate the first complementary code and the second complementary code of 13×2 n bit length each, which together form one transmission signal of 26×2 n bit length, wherein n is an integer greater than 1.

11. The pointer detection apparatus according to claim 1 , wherein said pair of seed complementary codes is selected from a group consisting of a pair of 2-bit seed codes, a pair of 10-bit seed codes, and a pair of 26-bit seed codes.

12. The pointer detection apparatus according to claim 11 , wherein the pair of 2-bit seed codes, A=[1, 1] and B=[1, −1], are used, to generate the first complementary code and the second complementary code of 2 n bit length each, which together form one transmission signal of 2×2 n bit length, wherein n is an integer greater than 1.

13. The pointer detection apparatus according to claim 12 , wherein the first complementary code based on the pair of 2-bit seed codes is A 2 n =A 2 n-1 & B 2 n-1 and the second complementary code based on the pair of 2-bit seed codes is B 2 n =A 2 n-1 & B 2 n-1 , wherein a numerical symbol following A and B indicates a bit length of the first complementary code and the second complementary code, respectively.

14. The pointer detection apparatus according to claim 11 , wherein the pair of 10-bit seed codes are used to generate the first complementary code and the second complementary code of 5×2 n bit length

Assignees

• Yamamoto Sadao
• Oda Yasuo
• Sugiyama Yoshihisa
• Wacom Co Ltd

Inventors

• Yamamoto Sadao
• Oda Yasuo
• Sugiyama Yoshihisa

Classifications

• G06F3/0446 Primary

  using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes · CPC title

• G06F3/044

  by capacitive means · CPC title

• G06F3/0416 Primary

  Control or interface arrangements specially adapted for digitisers · CPC title

• G06F3/04166 Primary

  Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving (Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally G06F3/04184) · CPC title