Direct current link circuit

Patent metadata

Field	Value
Publication number	US-9235228-B2
Application number	US-201313782519-A
Country	US
Kind code	B2
Filing date	Mar 1, 2013
Priority date	Mar 5, 2012
Publication date	Jan 12, 2016
Grant date	Jan 12, 2016

Abstract

An electronic circuit for converting power from a floating source of DC power to a dual direct current (DC) output is disclosed. The electronic circuit may include a positive input terminal and a negative input terminal connectible to the floating source of DC power. The dual DC output may connectible to the input of an inverter. A positive output terminal connected to the positive input terminal of the inverter and a negative output terminal and a ground terminal which may be connected to the input of the inverter. A series connection of a first power switch and a second power switch connected across the positive input terminal and the negative input terminal. A negative return path may include a first diode and a second diode connected between the negative input terminal and the negative output terminal. A resonant circuit may connect between the series connection and the negative return path.

First claim

The invention claimed is:

1. An electronic circuit comprising:
positive and negative input terminals adapted to be connected across a floating source of direct current (DC) power;
positive and negative output terminals;
first and second switches connected in series across the positive and negative input terminals, wherein a connection point between the first and the second switches forms a first node;
first and second diodes connected in series, wherein a connection point between the first and the second diodes forms a second node; and
a first resonant circuit connected in series between the first and the second nodes, wherein, when the first switch is closed and the second switch is open, the first resonant circuit is connected across the positive and the negative input terminals through the first diode, and wherein, when the first switch is open and the second switch is closed, the positive and the negative output terminals and the first resonant circuit are connected in series across the positive and the negative input terminals through the second diode.

2. The electronic circuit of claim 1 , wherein a cathode of the first diode is connected to the negative input terminal, an anode of the second diode is connected to the negative output terminal, and an anode of the first diode and a cathode of the second diode are connected to the second node.

3. The electronic circuit of claim 1 , wherein an anode of the first diode is connected to the positive input terminal, a cathode of the second diode is connected to the positive output terminal, and a cathode of the first diode and an anode of the second diode are connected to the second node.

4. The electronic circuit of claim 1 , further comprising a charge storage device connected across the positive and the negative input terminals.

5. The electronic circuit of claim 1 , wherein the first resonant circuit comprises an inductor and a capacitor connected in series between the first and the second nodes.

6. The electronic circuit of claim 1 , further comprising:
a ground output terminal;
a first capacitor connected between the positive and the ground output terminals;
a second capacitor connected between the negative and the ground output terminals; and
an inverter having a positive inverter input terminal connected to the positive output terminal, a negative inverter input terminal connected to the negative output terminal, and a ground inverter terminal connected to the ground output terminal.

7. The electronic circuit of claim 1 , further comprising first and second drive circuits adapted to gate the first and the second switches alternatively with a pulse width modulation (PWM) cycle such that the first switch is closed while the second switch is open during a first half of the PWM cycle and the second switch is closed while the first switch is open during a second half of the PWM cycle.

8. The electronic circuit of claim 7 , wherein the first and the second drive circuits are adapted to gate the first and the second switches alternatively with less than a fifty percent duty cycle so as to avoid cross conduction between the first and the second switches.

9. The electronic circuit of claim 7 , wherein the first and the second drive circuits are configured to open and close the first and the second switches with substantially zero current through the first and the second switches.

10. The electronic circuit of claim 1 , further comprising:
third and fourth switches connected in series across the positive and the negative input terminals, wherein a connection point between the third and the fourth switches forms a third node;
third and fourth diodes connected in series, wherein a connection point between the third and the fourth diodes forms a fourth node; and
a second resonant circuit connected in series between the third and the fourth nodes, wherein, when the third switch is closed and the fourth switch is open, the second resonant circuit is connected across the positive and the negative input terminals through the third diode, wherein, when the third switch is open and the fourth switch is closed, the positive and the negative output terminals and the second resonant circuit are connected in series across the positive and the negative input terminals through the fourth diode, wherein the first and the fourth switches are configured to be opened and closed together, and wherein the second and the third switches are configured to be opened and closed together.

11. A method comprising:
connecting a floating source of direct current (DC) power across positive and negative input terminals of a circuit, the circuit comprising:
first and second switches connected in series across the positive and the negative input terminals, wherein a connection point between the first and the second switches forms a first node,
first and second diodes connected in series, wherein a connection point between the first and the second diodes forms a second node, and
a resonant circuit connected in series between the first and the second nodes, wherein, when the first switch is closed and the second switch is open, the resonant circuit is connected across the positive and the negative input terminals through the first diode, and wherein, when the first switch is open and the second switch is closed, positive and negative output terminals of a dual DC output and the resonant circuit are connected in series across the positive and the negative input terminals through the second diode, and wherein the dual DC output is referenced to a ground output terminal; and

gating, alternatively, the first and the second switches such that the first switch is closed and the second switch is open during a first phase of a pulse width modulation (PWM) cycle thereby charging the resonant circuit from the floating source of DC power, and such that the first switch is open and the second switch is closed during a second phase of the PWM cycle thereby discharging the resonant circuit to provide converted power to a load connected to the positive, the negative, and the ground output terminals.

12. The method of claim 11 , wherein the first and the second diodes are connected in one of the following manners:
a cathode of the first diode is connected to the negative input terminal, an anode of the second diode is connected to the negative output terminal, and an anode of the first diode and a cathode of the second diode are connected to the second node; and
an anode of the first diode is connected to the positive input terminal, a cathode of the second diode is connected to the positive output terminal, and a cathode of the first diode and an anode of the second diode are connected to the second node.

13. The method of claim 11 , wherein the load comprises an inverter, the method further comprising:
inverting the converted power with the inverter.

14. The method of claim 11 , further comprising
gating, alternatively, the first and the second switches with less than a fifty percent pulse width modulation duty cycle so as to avoid cross conduction between the first and the second switches.

15. The method of claim 11 , further comprising
gating, alternatively, the first and the second switches such that the first and the second switches open and close with substantially zero current through the first and the second switches.

Assignees

• Solaredge Technologies Ltd

Inventors

• Gazit Meir
• Lubomirsky Vadim

Classifications

• G05F3/08 Primary

  wherein the variable is DC · CPC title

• Y02B70/1425

  Cross-Sectional Technologies · mapped topic

• H02M7/44

  by static converters · CPC title

• H02M3/158

  including plural semiconductor devices as final control devices for a single load · CPC title

• Y02E10/56

  Power conversion systems, e.g. maximum power point trackers · CPC title