Method and apparatus for merging multiple geometrical pixel images and generating a single modulator pixel image

US9235127B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9235127-B2
Application numberUS-201414158742-A
CountryUS
Kind codeB2
Filing dateJan 17, 2014
Priority dateMar 5, 2010
Publication dateJan 12, 2016
Grant dateJan 12, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The present invention relates to customizing individual workpieces, such as chip, flat panels or other electronic devices produced on substrates, by direct writing a custom pattern. Customization can be per device, per substrate, per batch or at some other small volume that makes it impractical to use a custom mask or mask set. In particular, it relates to customizing a latent image formed in a patterning sensitive layer over a substrate, merging standard and custom pattern data to form a custom pattern used to produce the customized latent image. A wide variety of substrates can benefit from the technology disclosed.

First claim

Opening claim text (preview).

We claim as follows: 1. A method of forming a custom latent image in a patterning layer over a substrate, the method including: receiving standard pattern data; receiving custom pattern data; merging the standard and custom pattern data to form a merged-rasterized pattern data that represents a physical, custom latent image to be formed in a patterning layer; and forming the custom latent image in the patterning layer from the merged-rasterized pattern data using a direct writing device. 2. The method of claim 1 , wherein the merging includes merging by resampling of the standard and custom data, wherein multiple grids associated with the respective standard and custom pattern data are resampled to a common grid, in order to allow non-matching pixel grids to be merged. 3. The method of claim 1 , further including applying the merging to a second portion of pattern data for a particular custom latent image while a first portion of merged-rasterized pattern data is being used by the direct writing device to form a first portion of the particular custom latent image. 4. The method of claim 1 , wherein the standard pattern data represents a pattern field that repeats at a plurality of adjoining locations and the custom data represents a pattern edge. 5. The method of claim 1 , wherein the standard pattern data represents a pattern field that repeats at a plurality of adjoining locations and the custom data represents a stitching areas between the adjoining locations. 6. The method of claim 1 , wherein the substrate is any of a silicon wafer, a semiconductor wafer, a circuit board, or a flat-panel display, further including developing the custom latent image and forming one or more electronic devices from the substrate. 7. The method of claim 3 , wherein the substrate is any of a silicon wafer, a semiconductor wafer, a circuit board, or a flat-panel display. 8. The method of claim 3 , wherein the substrate is a flexible material used in roll-to-roll production. 9. The method of claim 1 , further including applying the receiving and forming actions one or more times, patterning layers over the substrate using the custom latent images, and forming electronic devices using the patterned layers. 10. The method of claim 1 , wherein the custom data is unique to a particular batch of substrates. 11. The method of claim 10 , wherein the custom data is unique to a particular substrate. 12. The method of claim 11 , wherein the custom data is unique to a particular die on a particular substrate.

Assignees

Inventors

Classifications

  • Data handling in all parts of the microlithographic apparatus, e.g. handling pattern data for addressable masks or data transfer to or from different components within the exposure apparatus · CPC title

  • Addressable masks, e.g. spatial light modulators [SLMs], digital micro-mirror devices [DMDs] or liquid crystal display [LCD] patterning devices · CPC title

  • Computer-aided design [CAD] · CPC title

  • G03F7/2051Primary

    Exposure without an original mask, e.g. using a programmed deflection of a point source, by scanning, by drawing with a light beam, using an addressed light or corpuscular source (G03F7/70 takes precedence) · CPC title

  • Tagging, i.e. hardware or software tagging of features or components, e.g. using tagging scripts or tagging identifier codes for identification of chips, shots or wafers · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9235127B2 cover?
The present invention relates to customizing individual workpieces, such as chip, flat panels or other electronic devices produced on substrates, by direct writing a custom pattern. Customization can be per device, per substrate, per batch or at some other small volume that makes it impractical to use a custom mask or mask set. In particular, it relates to customizing a latent image formed in a…
Who is the assignee on this patent?
Micronic Mydata AB, Mycronic AB
What technology area does this patent fall under?
Primary CPC classification G03F7/70291. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).