High performance class AB operational amplifier

Patent metadata

Field	Value
Publication number	US-9231540-B2
Application number	US-201414304589-A
Country	US
Kind code	B2
Filing date	Jun 13, 2014
Priority date	Oct 7, 2011
Publication date	Jan 5, 2016
Grant date	Jan 5, 2016

Abstract

A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage.

First claim

The invention claimed is:

1. A class AB operational amplifier comprising:
an input stage;
an output stage; and
a level shifter stage and a control circuit coupled thereto and configured to control a quiescent current of the output stage and to transfer a signal from the input stage to the output stage,
the control circuit comprising
a differential pair of transistors having differential input terminals,
an impedance,
first and second intermediate transistors coupled in series by the impedance and arranged between a first and a second reference voltage, and
the impedance having a voltage thereacross being a differential voltage at the differential input terminals that controls the level shifter stage.

2. The operational amplifier according to claim 1 , wherein said control circuit comprises circuitry coupled with the input terminals of the differential pair of transistors and wherein a first bias current flows, the control circuit being configured to control the quiescent current to be proportional to the amount of said first bias current.

3. The operational amplifier according to claim 2 , wherein said circuitry of the control circuit comprises a first and a second circuit branch connected with the respective input terminals of the differential pair of transistors, said circuit branches being a replica circuit of the two circuit branches of the output stage and the level shifter stage which are connected at the respective terminals of the impedance.

4. The operational amplifier according to claim 2 , wherein said differential pair of transistors comprises a MOS transistor and a resistance arranged between the source terminals of the differential pair of transistors, said impedance comprising a further resistance and said resistance being proportional to the further resistance, said differential pair of transistors being configured so that the voltage across the resistance is the differential voltage at the differential terminals of the differential pair of transistors.

5. The operational amplifier according to claim 4 , wherein said control circuit comprises a first transistor forming with an intermediate transistor of the level shifter stage a current mirror to mirror the current flowing through the differential pair of transistors into the level shifter stage, said first transistor being a replica of said intermediate transistor.

6. The class AB operational amplifier of claim 1 further comprising an additional input stage, output stage, level shifter stage, and control circuit.

7. A class AB operational amplifier comprising:
an input stage having a differential pair of transistors;
an output stage;
a level shifter stage to control the bias current of the output stage and to transfer the signal from the input stage to the output stage; and
a control circuit coupled to the level shifter stage,
wherein the control circuit comprises replica transistors from the level shifter stage and the output stage, and generates a replica output current from the output stage.

8. The class AB operational amplifier of claim 7 wherein the differential pair of transistors comprises PMOS transistors.

9. The class AB operational amplifier of claim 7 wherein the output stage comprises a first transistor and a second transistor, in series connection.

10. The class AB operational amplifier of claim 9 wherein the first transistor comprises a PMOS transistor and the second transistor comprises an NMOS transistor.

11. The class AB operational amplifier of claim 9 wherein a series-connected resistor and capacitor are coupled between a gate and a drain of the second transistor.

12. The class AB operational amplifier of claim 7 wherein the level shifter stage comprises a first transistor and a second transistor, coupled together by an impedance.

13. The class AB operational amplifier of claim 12 wherein the first transistor comprises a PMOS transistor and the second transistor comprises an NMOS transistor.

14. The class AB operational amplifier of claim 12 wherein the impedance comprises a resistor and a capacitor in parallel.

15. The class AB operational amplifier of claim 12 wherein an intermediate node between the first transistor and the impedance is coupled to ground.

16. The class AB operational amplifier of claim 7 further comprising a first circuit branch and a second circuit branch coupled to the differential pair of transistors.

17. A class AB operational amplifier comprising:
two symmetrical circuits, each circuit comprising:
an input stage;
an output stage;
a level shifter stage to control the bias current of the output stage and to transfer the signal from the input stage to the output stage;
an impedance;
first and second intermediate transistors coupled in series by the impedance and arranged between a first and a second reference voltage; and
a control circuit coupled to the level shifter stage,
wherein the control circuit comprises replica transistors from the level shifter stage and the output stage, and generates a replica output current from the output stage.

Assignees

• St Microelectronics Grenoble 2
• St Microelectronics Srl
• St Microelectronics Srl

Inventors

• Cavallaro Marcoorazio
• Ramet Serge
• Chiarillo Tiziano

Classifications

• H03F2003/45008

  Electricity · mapped topic

• H03F3/3013

  using a common drain driving stage, i.e. follower stage · CPC title

• H03F2203/45054

  the cascode stage of the cascode dif amp being a current mirror · CPC title

• H03F3/45183

  Long tailed pairs (H03F3/4521, H03F3/45237 take precedence) · CPC title

• H03F3/45179 Primary

  using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title