Semiconductor device
US-9041051-B2 · May 26, 2015 · US
US9231090B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9231090-B2 |
| Application number | US-201314375895-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 18, 2013 |
| Priority date | Mar 2, 2012 |
| Publication date | Jan 5, 2016 |
| Grant date | Jan 5, 2016 |
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In a trench-gate-type insulated gate bipolar transistor, a current will not flow down to a lower portion of a trench, a high electrical field at the lower portion of the trench is suppressed even if a high voltage is applied, such as at a time of turning off, an increase in on-state resistance and a decrease in breakdown resistance and withstand voltage are suppressed. In the semiconductor device, a plurality of trenches is disposed to reach a rear surface of a drift layer, and a collector layer is disposed at a tip end side in an extended direction of the trenches in a surface layer portion of the drift layer. When a gate electrode is applied with a predetermined voltage, a channel region is formed in a portion of the base layer contacting the trenches, and an electric current flows in the predetermined direction along the trenches.
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device comprising: a semiconductor layer providing a first conductivity-type drift layer; a second conductivity-type base layer disposed at least in a surface layer portion of the drift layer adjacent to a front surface of the drift layer; a plurality of trenches extended in a predetermined direction from the base layer to the drift layer; a gate insulation film disposed on a wall surface of each of the plurality of trenches; a gate electrode disposed on the gate insulation film; a first conductivity-type emitter layer disposed in a surface layer portion of the base layer and at side portions of the plurality of trenches; a second conductivity-type collector layer disposed in the surface layer portion of the drift layer and separated from the base layer; an emitter electrode electrically connected to the emitter layer and the base layer; and a collector electrode electrically connected to the collector layer, wherein the trenches are disposed to reach a rear surface of the drift layer, the collector layer is disposed at a tip end side in an extended direction of the trenches in the surface layer portion of the drift layer, and when the gate electrode is applied with a predetermined voltage, a channel region is formed in a portion of the base layer contacting the trenches and an electric current flows in the predetermined direction along the trenches. 2. The semiconductor device according to claim 1 , wherein in each of the trenches, a length of an end adjacent to the collector layer is greater than a length of the other end opposite to the end, the length being defined in a direction perpendicular to the predetermined direction. 3. The semiconductor device according to claim 1 , wherein the base layer is disposed to reach the rear surface of the drift layer. 4. The semiconductor device according to claim 1 , wherein the semiconductor layer is disposed on a support substrate through a separation film for electrically insulating the semiconductor layer from the support substrate, and the trenches are disposed to reach the separation film. 5. The semiconductor device according to claim 1 , wherein the emitter layer is disposed on the side portions of the respective trenches in the front surface of the semiconductor layer and surrounds the other ends of the trenches opposite to the ends adjacent to the collector layer.
having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title
within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title
Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127) · CPC title
of lateral BJTs · CPC title
of lateral BJTs · CPC title
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