Thin film transistor array substrate and organic light-emitting display apparatus including the same

US9231000B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9231000-B2
Application numberUS-201313961823-A
CountryUS
Kind codeB2
Filing dateAug 7, 2013
Priority dateFeb 28, 2013
Publication dateJan 5, 2016
Grant dateJan 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A thin film transistor array substrate includes a plurality of pixels, each of the pixels including a capacitor comprising a first electrode, and a second electrode located above the first electrode, a data line extending in a first direction, configured to provide a data signal, located above the capacitor, and overlapping a part of the capacitor, and a driving voltage line configured to supply a driving voltage, located between the capacitor and the data line, and comprising a first line extending in the first direction, and a second line extending in a second direction substantially perpendicular to the first direction.

First claim

Opening claim text (preview).

What is claimed is: 1. A thin film transistor array substrate comprising a plurality of pixels, each of the pixels comprising: a capacitor comprising a first electrode, and a second electrode located above the first electrode; a data line extending in a first direction, configured to provide a data signal, located above the capacitor, and overlapping a part of the capacitor; and a driving voltage line configured to supply a driving voltage, located between the capacitor and the data line, and comprising a first line extending in the first direction, and a second line extending in a second direction substantially perpendicular to the first direction. 2. The thin film transistor array substrate of claim 1 , wherein the second electrode of the capacitor is electrically coupled to the driving voltage line via a contact hole. 3. The thin film transistor array substrate of claim 1 , wherein the driving voltage line has a mesh structure. 4. The thin film transistor array substrate of claim 1 , wherein the first line of the driving voltage line is coupled to ones of the pixels that are adjacent each other in the first direction, and wherein the second line of the driving voltage line is coupled to ones of the pixels that are adjacent each other in the second direction. 5. The thin film transistor array substrate of claim 1 , wherein the second line of the driving voltage line completely covers the capacitor. 6. The thin film transistor array substrate of claim 1 , further comprising: a first interlayer insulating layer and a second interlayer insulating layer stacked between the capacitor and the driving voltage line; and a third interlayer insulating layer between the driving voltage line and the data line. 7. The thin film transistor array substrate of claim 1 , wherein each of the plurality of pixels further comprises: a driving thin film transistor (TFT) electrically coupled between the driving voltage line and a light-emitting device; and a switching TFT electrically coupled between the data line and the driving TFT. 8. The thin film transistor array substrate of claim 7 , wherein the driving TFT comprises: a semiconductor layer; a gate electrode coupled to the first electrode of the capacitor and located above the semiconductor layer at a same layer as the second electrode of the capacitor; a source electrode electrically coupled to the driving voltage line; and a drain electrode electrically coupled to the light-emitting device. 9. The thin film transistor array substrate of claim 7 , wherein the switching TFT comprises: a semiconductor layer; a gate electrode located above the semiconductor layer at a same layer as the first electrode of the capacitor, and coupled to a first scan line extending in the second direction; a source electrode coupled to the data line; and a drain electrode coupled to the driving TFT. 10. The thin film transistor array substrate of claim 1 , wherein each of the plurality of pixels further comprises: a first scan line, a second scan line, and an emission control line extending in the second direction at a same layer as the first electrode of the capacitor; and an initialization voltage line extending in the second direction between the driving voltage line and the second electrode of the capacitor. 11. An organic light-emitting display apparatus comprising a plurality of pixels each comprising: a capacitor comprising a first electrode and a second electrode above the first electrode; a data line configured to provide a data signal and located above, and overlapping a part of, the capacitor, the data line extending in a first direction; and a driving voltage line located between the capacitor and the data line and configured to supply a driving voltage, the driving voltage line comprising a first line extending in the first direction, and a second line extending in a second direction substantially perpendicular to the first direction. 12. The organic light-emitting display apparatus of claim 11 , wherein the second electrode of the capacitor is electrically coupled to the driving voltage line via a contact hole. 13. The organic light-emitting display apparatus of claim 11 , wherein the driving voltage line has a mesh structure. 14. The organic light-emitting display apparatus of claim 11 , wherein the first line of the driving voltage line is coupled to ones of the pixels that are adjacent each other in the first direction, and wherein the second line of the driving voltage line is coupled to ones of the pixels that are adjacent each other in the second direction. 15. The organic light-emitting display apparatus of claim 11 , wherein the second line of the driving voltage line completely covers the capacitor. 16. The organic light-emitting display apparatus of claim 11 , further comprising: a first interlayer insulating layer and a second interlayer insulating layer stacked between the capacitor and the driving voltage line; and a third interlayer insulating layer between the driving voltage line and the data line. 17. The organic light-emitting display apparatus of claim 11 , further comprising a first TFT electrically coupled between the driving voltage line and a light-emitting device, and a second TFT coupled between the data line and the first TFT. 18. The organic light-emitting display apparatus of claim 17 , wherein the first TFT further comprises: a semiconductor layer; a source electrode electrically coupled to the driving voltage line; and a drain electrode electrically coupled to the light-emitting device, wherein a gate electrode of the first TFT is located above the semiconductor layer at a same layer as the second electrode of the capacitor, and is coupled to the first electrode of the capacitor. 19. The organic light-emitting display apparatus of claim 17 , wherein the second TFT further comprises: a semiconductor layer; a source electrode coupled to the data line; and a drain electrode coupled to the first TFT, wherein a gate electrode of the second TFT is located above the semiconductor layer at a same layer as the first electrode of the capacitor, and is coupled to a first scan line that extends in the second direction. 20. The organic light-emitting display apparatus of claim 11 , wherein each of the plurality of pixels further comprises: a first scan line, a second scan line, and an emission control line extending in the second direction and located at a same layer as the first electrode of the capacitor; and an initialization voltage line extending in the second direction and located between the second electrode of the capacitor and the driving voltage line.

Assignees

Inventors

Classifications

  • Interconnections, e.g. scanning lines · CPC title

  • H10D86/481Primary

    integrated with passive devices, e.g. auxiliary capacitors · CPC title

  • having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs · CPC title

  • H10D86/60Primary

    wherein the TFTs are in active matrices · CPC title

  • Electricity · mapped topic

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What does patent US9231000B2 cover?
A thin film transistor array substrate includes a plurality of pixels, each of the pixels including a capacitor comprising a first electrode, and a second electrode located above the first electrode, a data line extending in a first direction, configured to provide a data signal, located above the capacitor, and overlapping a part of the capacitor, and a driving voltage line configured to suppl…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D86/481. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).