Magnetic memory, spin element, and spin MOS transistor

Patent metadata

Field	Value
Publication number	US-9230625-B2
Application number	US-201414204422-A
Country	US
Kind code	B2
Filing date	Mar 11, 2014
Priority date	Apr 3, 2013
Publication date	Jan 5, 2016
Grant date	Jan 5, 2016

Abstract

A magnetic memory according to an embodiment includes: a multilayer structure including a semiconductor layer and a first ferromagnetic layer; a first wiring line electrically connected to the semiconductor layer; a second wiring line electrically connected to the first ferromagnetic layer; and a voltage applying unit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the first ferromagnetic layer during a write operation, a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.

First claim

The invention claimed is:

1. A magnetic memory comprising:
a multilayer structure including in order a semiconductor layer, a first ferromagnetic layer, a nonmagnetic layer, and a second ferromagnetic layer, the first ferromagnetic layer being in contact with the semiconductor layer, the semiconductor layer and the first ferromagnetic layer forming a Schottky barrier in between;
a first wiring line electrically connected to the semiconductor layer;
a second wiring line electrically connected to the second ferromagnetic layer; and
a voltage applying circuit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the second ferromagnetic layer during a write operation,
a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.

2. A memory according to claim 1 wherein the first ferromagnetic layer is formed of any of an oxide magnetic material, a Mn-based magnetic material, and a Heusler-based magnetic material.

3. A magnetic memory comprising:
a multilayer structure including in order a semiconductor layer, a first ferromagnetic layer, a nonmagnetic layer, and a second ferromagnetic layer, and including a first insulating film disposed between the semiconductor layer and the first ferromagnetic layer, the first insulating film being in contact with the semiconductor layer and being in contact with the first ferromagnetic layer;
a first wiring line electrically connected to the semiconductor layer;
a second wiring line electrically connected to the second ferromagnetic layer; and
a voltage applying circuit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the second ferromagnetic layer during a write operation,
a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.

4. A memory according to claim 1 , wherein the voltage applying circuit applies a second voltage between the first wiring line and the second wiring line via the multilayer structure during a read operation, to cause a read current to flow through the multilayer structure.

5. A memory according to claim 4 , wherein a polarity of the first voltage is opposite to a polarity of the second voltage.

6. A memory according to claim 1 , wherein the multilayer structure is disposed between the first wiring line and the second wiring line.

7. A magnetic memory comprising:
a multilayer structure including a nonmagnetic conductive layer, a first ferromagnetic layer, a nonmagnetic insulating layer disposed between the nonmagnetic conductive layer and the first ferromagnetic layer, a nonmagnetic layer disposed on the first ferromagnetic layer on a side opposite to the nonmagnetic insulating layer, and a second ferromagnetic layer disposed on the nonmagnetic layer on a side opposite to the first ferromagnetic layer, the nonmagnetic conductive layer and the nonmagnetic insulating layer opposed to each other without having a magnetic material disposed therebetween;
a first wiring line electrically connected to the nonmagnetic conductive layer;
a second wiring line electrically connected to the second ferromagnetic layer; and
a voltage applying circuit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the nonmagnetic conductive layer and the second ferromagnetic layer,
a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.

8. A memory according to claim 7 , wherein the voltage applying circuit applies a second voltage between the first wiring line and the second wiring line via the multilayer structure during a read operation, to cause a read current to flow through the multilayer structure.

9. A memory according to claim 8 wherein a polarity of the first voltage is opposite to a polarity of the second voltage.

10. A magnetic memory comprising:
a magnetic structure including in order, a nonmagnetic metal layer, an insulating film which is in contact with the nonmagnetic metal layer, and a first ferromagnetic layer disposed in contact with the insulating film on a side opposite to the nonmagnetic metal layer;
a first wiring line electrically connected to the nonmagnetic metal layer;
a second wiring line electrically connected to the first ferromagnetic layer; and
a voltage applying circuit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the nonmagnetic metal layer and the first ferromagnetic layer during a write operation, and to apply a second voltage between the nonmagnetic metal layer and the first ferromagnetic layer during a read operation, a polarity of the first voltage being opposite to a polarity of the second voltage,
a magnetization direction of the first ferromagnetic layer being switchable by applying the reverse-bias first voltage.

11. A memory according to claim 3 wherein the first ferromagnetic layer is formed of any of an oxide magnetic material, a Mn-based magnetic material, and a Heusler-based magnetic material.

12. A memory according to claim 3 , wherein the voltage applying circuit applies a second voltage between the first wiring line and the second wiring line via the multilayer structure during a read operation, to cause a read current to flow through the multilayer structure.

13. A memory according to claim 12 , wherein a polarity of the first voltage is opposite to a polarity of the second voltage.

14. A memory according to claim 3 , wherein the multilayer structure is disposed between the first wiring line and the second wiring line.

15. A memory according to claim 10 , further comprising a nonmagnetic layer disposed on the first ferromagnetic layer on a side opposite to the insulating film, the nonmagnetic layer being electrically connected to the second wiring line.

16. A memory according to claim 15 , further comprising a second ferromagnetic layer disposed on the nonmagnetic layer on a side opposite to the first ferromagnetic layer, the second ferromagnetic layer being electrically connected to the second wiring line.

17. A magnetic memory comprising:
a multilayer structure including in order a semiconductor layer, and a first ferromagnetic layer, the first ferromagnetic layer being in contact with the semiconductor layer, the semiconductor layer and the first ferromagnetic layer forming a Schottky barrier in between;
a first wiring line electrically connected to the semiconductor layer;
a second wiring line electrically connected to the first ferromagnetic layer; and
a voltage applying circuit electrically connected between the first wiring line and the second wiring line to apply a first voltage between the semiconductor layer and the first ferromagnetic layer during a write operation,
a magnetization direction of the first ferromagnetic layer being switchable by applying the first voltage.

18. A memory according to claim 17 wherein the first ferromagnetic layer is formed of any of an oxide magnetic material, a Mn-based magnetic material, and a Heusler-based magnetic material.

19. A memory according to claim 17 , wherein the voltage applying circuit applies a second voltage between the first wiring line and the second wiring line via the multilayer structure during a read operation, to cause a read current to flow through the multilayer structure, and a polarity of the first voltage is oppo

Assignees

• Toshiba Kk

Inventors

• Inokuchi Tomoaki
• Ishikawa Mizue
• Sugiyama Hideyuki
• Tanamoto Tetsufumi
• Takashima Akira
• Saito Yoshiaki

Classifications

• H10D48/385

  Devices using spin-polarised carriers · CPC title

• H10D48/40

  Devices controlled by magnetic fields · CPC title

• G11C11/16

  using elements in which the storage effect is based on magnetic spin effect · CPC title

• H01L29/82

  Electricity · mapped topic

• G11C11/161 Primary

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title