Memory page offloading in multi-node computer systems

Patent metadata

Field	Value
Publication number	US-9229878-B2
Application number	US-201313914109-A
Country	US
Kind code	B2
Filing date	Jun 10, 2013
Priority date	Jun 10, 2013
Publication date	Jan 5, 2016
Grant date	Jan 5, 2016

Abstract

Systems and methods for memory page offloading in multi-processor computer systems. An example method may comprise: detecting, by a computer system, a memory pressure condition on a first node; invalidating a page table entry for a memory page residing on the first node; copying the memory page to a second node; and updating the page table entry for the memory page to reference the second node.

First claim

The invention claimed is:

1. A method, comprising:
detecting, by a processor, a memory pressure condition on a first node;
invalidating a page table entry for a memory page residing on the first node;
copying, by the processor, the memory page directly to a second node without swapping the memory page to a backing storage; and
updating the page table entry for the memory page to reference the second node.

2. The method of claim 1 , wherein the first node and the second node are represented by Non-Uniform Memory Access (NUMA) nodes.

3. The method of claim 1 , wherein the detecting comprises determining that an amount of available memory on the first node is below an available memory threshold.

4. The method of claim 1 , wherein the detecting comprises determining that a number of page faults exceeds a page fault threshold.

5. The method of claim 1 , wherein the detecting is performed periodically with a defined frequency.

6. The method of claim 1 , wherein the detecting is performed responsive to failing to satisfy a memory allocation request on the first node.

7. The method of claim 1 , wherein the invalidating comprises selecting a least recently used memory page.

8. The method of claim 1 , wherein the copying comprises selecting the second node as being topologically closest to the first node.

9. The method of claim 1 , wherein the copying comprises selecting the second node as having a maximum amount of memory available among two or more candidate nodes.

10. The method of claim 1 , wherein the copying comprises selecting the second node as having a minimal load on one or more processors among two or more candidate nodes.

11. The method of claim 1 , further comprising:
determining that an access count to the memory page copied to the second node exceeds an access count threshold;
invalidating the page table entry;
copying the memory page to the first node; and
updating the page table entry for the memory page to reference the first node.

12. A system comprising:
a memory; and
a processor, operatively coupled to the memory, to:
detect a memory pressure condition on a first node;
invalidate a page table entry for a memory page residing on the first node;
copy the memory page directly to a second node without swapping the memory page to a backing storage; and
update the page table entry for the memory page to reference the second node.

13. The system of claim 12 , wherein the first node and the second node are represented by Non-Uniform Memory Access (NUMA) nodes.

14. The system of claim 12 , wherein to detect a memory pressure condition on a first node, the processor is to determine that an amount of available memory on the first node is below an available memory threshold.

15. The system of claim 12 , wherein to detect a memory pressure condition on a first node, the processor is to determine that a number of page faults exceeds a page fault threshold.

16. The system of claim 12 , wherein the processor is to periodically with a defined frequency evaluate the memory pressure condition on the first node.

17. The system of claim 12 , wherein to copy the memory page to the second node, the processor is to select the second node as being topologically closest to the first node.

18. The system of claim 12 , wherein to copy the memory page to the second node, the processor is to select the second node as having a maximum amount of memory available among two or more candidate nodes.

19. The system of claim 12 , wherein to copy the memory page to the second node, the processor is to select the second node as having a minimal load on one or more physical processors among two or more candidate nodes.

20. A computer-readable non-transitory storage medium comprising executable instructions to cause a processor to:
detect, by the processor, a memory pressure condition on a first node;
invalidate a page table entry for a memory page residing on the first node;
copy the memory page directly to a second node without swapping the memory page to a backing storage; and
update the page table entry for the memory page to reference the second node.

Assignees

• Red Hat Israel Ltd

Inventors

• Hod Ronen
• Tsirkin Michael

Classifications

• G06F12/0284 Primary

  Multiple user address space allocation, e.g. using different base addresses (interprocessor communication G06F15/163) · CPC title

• G06F11/34

  Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation {; Recording or statistical evaluation of user activity, e.g. usability assessment} · CPC title

• G06F12/122 Primary

  of the least frequently used [LFU] type, e.g. with individual count value · CPC title

• G06F12/08

  in hierarchically structured memory systems, e.g. virtual memory systems · CPC title

• G06F9/5033

  considering data affinity · CPC title