Error correction with on-demand parity sectors in magnetic data storage devices

Patent metadata

Field	Value
Publication number	US-9229813-B2
Application number	US-201414199807-A
Country	US
Kind code	B2
Filing date	Mar 6, 2014
Priority date	Mar 6, 2014
Publication date	Jan 5, 2016
Grant date	Jan 5, 2016

Abstract

Data storage devices are described with an ECC system that generate additional on-demand ECC information for a previously written track to provide for correction of data errors in the track and thereby avoid having to rewrite the track. Embodiments of the invention address the squeeze-error problem that arises when writing the next (second) track in a sequence causes errors to be introduced in the adjacent previously written (first) track. In alternative embodiments the existence of the data errors in the first track can be detected by reading the track or by estimating the number of likely errors using head position data measured while writing the first and second tracks. The additional on-demand ECC information can be written on any track that is available.

First claim

The invention claimed is:

1. A data storage device that stores data in a region on a disk in a plurality of tracks that include a plurality of sectors of data, the data storage device comprising:
a track-level error correction system that writes a first set of parity sectors on a selected first track on the disk in addition to a first set of sectors of data, the first set of parity sectors being calculated using the first set of sectors of data stored in a memory; and
an on-demand error correction system that determines a number of data sector errors in the first set of sectors of data on the first track after an adjacent second track has been written, and responsive to the number exceeding a selected threshold value, writes a second set of parity sectors calculated using the first set of sectors of data stored in the memory, and wherein the second set of parity sectors is written on a selected third track that is different from the selected first track.

2. The data storage device of claim 1 wherein there are R 1 parity sectors in the first set of parity sectors and R 1 is constant for all tracks in the region;
and there are R 2 parity sectors in the second set of parity sectors and R 2 varies in size according to the number of data sector errors and has a maximum size larger than R 1 .

3. The data storage device of claim 1 where there are R 1 parity sectors in the first set of parity sectors and R 2 parity sectors in the second set of parity sectors and wherein a process of retrieving data from the selected first track includes error correction of up to R 1 data sectors by the track-level error correction system using the first set of parity sectors;
and wherein the on-demand error correction system performs error correction when the track-level error correction system fails to correct all errors detected in the data as read from the disk from the selected first track; and the on-demand error correction system performs error correction using the first and second sets of parity sectors to correct up to R 1 +R 2 data sectors.

4. The data storage device of claim 1 wherein the on-demand error correction system updates an Indirection Table to establish linkage between the second set of parity sectors and the selected first track.

5. The data storage device of claim 1 wherein the on-demand error correction system generates at least a selected number of parity sectors in the second set of parity sectors that are required to correct the number of data sector errors on the selected first track using the first and second sets of parity sectors.

6. The data storage device of claim 1 wherein the first set of sectors of data are written along with check symbols, which allow detection of erasures, and the number of data sector errors is determined using the check symbols and data as read from the disk.

7. The data storage device of claim 1 wherein the number of data sector errors is determined by comparing a first set of position error signal values, which are measured while writing the first set of sectors of data on the selected first track, with a second set of position error signal values, which are measured while writing the second set of sectors of data on the adjacent second track, to estimate a number of data sectors in the first set of sectors of data with squeeze errors based on a delta between corresponding elements in the first and second sets of position error signal values being below a selected value.

8. The data storage device of claim 7 wherein the on-demand error correction system transfers the R 1 subsets of the parity sectors from SRAM to DRAM by Direct Memory Access (DMA) for each iteration.

9. The data storage device of claim 1 wherein the first set of parity sectors includes a fixed number R 1 of parity sectors and track level error correction system uses R 1 multipliers that each include an SRAM to generate the R 1 parity sectors, and wherein the second set of parity sectors includes a variable number R 2 of parity sectors and R 2 is greater than R 1 for a subset of tracks and wherein the on-demand error correction system uses the R 1 multipliers to generate R 2 parity sectors by iteratively generating R 1 subsets of the R 2 parity sectors.

10. The data storage device of claim 1 wherein the track level and on-demand error correction system use a Cauchy-Matrix to generate the parity sectors.

11. A method of operating a data storage device that stores data in a region on a disk in tracks that include a plurality of sectors of data, the method comprising:
writing a first set of data sectors stored in a memory on a selected first track along with a first set of parity sectors calculated using the first set of data sectors;
writing an adjacent second track next to the selected first track; and
determining a number of data sector errors in the selected first track that exist after the adjacent second track has been written, and writing a second set of parity sectors for the selected first track when the number of data sector errors exceeds a selected threshold value, the second set of parity sectors being calculated using the first set of data sectors stored in the memory, and writing the second set of parity sectors on a selected third track that is different from the selected first track.

12. The method of claim 11 wherein writing the first set of data sectors further comprises writing check symbols that allow detection of erasure errors, and the method further comprises:
reading the first set of data sectors from the selected first track along with the first set of parity sectors and the check symbols; and
detecting errors in the first set of data sectors using the check symbols and correcting detected errors if detected errors are less than or equal to the number of parity sectors in the first set, otherwise retrieving the second set of parity sectors from the third track and using the first and second sets of parity sectors to correct the detected errors.

13. The method of claim 11 further comprising updating an Indirection Table to establish linkage between the second set of parity sectors and the selected first track.

14. The method of claim 11 wherein the second set of parity sectors contains at least a selected number of parity sectors that are required to correct the data sector errors determined to exist in the selected first track using the first and second sets of parity sectors.

15. The method of claim 11 wherein writing the first set of data sectors further comprises writing check symbols that allow detection of erasure errors, and the data sector errors are determined by reading the selected first track from disk and using the check symbols to detect errors.

16. The method of claim 11 wherein the data sector errors are determined by comparing a first set of position error signal values, which are measured while writing the selected first track, with a second set of position error signal values, which are measured while writing the adjacent second track, to estimate the number of data sector errors in the first set of data sectors based on a delta between corresponding elements in the first and second sets of position error signal values being below a selected value.

17. The method of claim 11 wherein the first set of parity sectors includes a fixed number R 1 of parity sectors for each track in the region and the device uses R 1 multipliers that each include an SRAM to generate the R 1 parity sectors, and wherein the second set of parity sectors includes a variable number R 2 of parity sectors that varies between tracks in the

Assignees

• HGST Netherlands BV

Inventors

• Chatradhi Sridhar
• Hassner Martin Aureliano
• Hwang Kirk
• Yamamoto Satoshi

Classifications

• H03M13/612

  Aspects specific to channel or signal-to-noise ratio estimation (H03M13/63 takes precedence) · CPC title

• H03M13/353

  Adaptation to the channel · CPC title

• H03M13/373

  with erasure correction and erasure determination, e.g. for packet loss recovery or setting of erasures for the decoding of Reed-Solomon codes · CPC title

• G06F13/28

  using burst mode transfer, e.g. direct memory access {DMA}, cycle steal (G06F13/32 takes precedence) · CPC title

• H03M13/3738

  with judging correct decoding · CPC title