Parallel inverter systems and methods
US-2024014751-A1 · Jan 11, 2024 · US
US9225262B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9225262-B2 |
| Application number | US-201213537316-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 29, 2012 |
| Priority date | Jun 29, 2012 |
| Publication date | Dec 29, 2015 |
| Grant date | Dec 29, 2015 |
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An inverter includes a multilevel bridge circuit. A control circuit is operatively coupled to the multilevel bridge circuit and configured to detect an overcurrent for an output of the inverter, to generate a measure of a duration of the overcurrent and to selectively put an output of the bridge circuit in a first impedance state or a second impedance state based on the measure. The first and second impedance states may provide respective first and second impedances between the bridge circuit output and a neutral.
Opening claim text (preview).
That which is claimed: 1. An inverter comprising: a multilevel bridge circuit; and a control circuit operatively coupled to the multilevel bridge circuit and configured to detect overcurrents for an output of the inverter, to generate measures of duration of the overcurrents and to selectively put an output of the bridge circuit in a first impedance state or a second impedance state for the detected overcurrents based on the measures, wherein the first and second impedance state…
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