Method for manufacturing a conducting contact on a conducting element

US9224708B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9224708-B2
Application numberUS-201414339630-A
CountryUS
Kind codeB2
Filing dateJul 24, 2014
Priority dateJul 25, 2013
Publication dateDec 29, 2015
Grant dateDec 29, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The invention relates to a method for producing an interconnection pad on a conducting element comprising an upper face and a side wall; the method being executed from a substrate at least the upper face of which is insulating; the conducting element going through at least an insulating portion of the substrate, the method being characterized in that it comprises the sequence of the following steps: a step of embossing the conducting element, a step of forming, above the upper insulating face of the substrate, a stack of layers comprising at least one electrically conducting layer and one electrically resistive layer, a step of partially removing the electrically resistive layer, a step of electrolytic growth on the portion of the electrically conducting layer so as to form at least one interconnection pad on said conducting element.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for producing at least one interconnection pad on a conducting element comprising an upper face and a side wall, the method being executed from a substrate at least an upper face of which is electrically insulating, the conducting element extending through a portion of the substrate, the method comprising the sequence of the following steps: a step of embossing the conducting element, so configured as to form a protrusion of the conducting ele…

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What does patent US9224708B2 cover?
The invention relates to a method for producing an interconnection pad on a conducting element comprising an upper face and a side wall; the method being executed from a substrate at least the upper face of which is insulating; the conducting element going through at least an insulating portion of the substrate, the method being characterized in that it comprises the sequence of the following s…
Who is the assignee on this patent?
Commissariat Energie Atomique, St Microelectronics Sa, St Microelectronics Sa
What technology area does this patent fall under?
Primary CPC classification H10W20/20. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).