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Hot-carrier injection programmable memory and method of programming such a memory
US9224482B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9224482-B2 |
| Application number | US-201414528780-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 30, 2014 |
| Priority date | Oct 31, 2013 |
| Publication date | Dec 29, 2015 |
| Grant date | Dec 29, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The present disclosure relates to a memory comprising at least one word line comprising a row of split gate memory cells each comprising a selection transistor section comprising a selection gate and a floating-gate transistor section comprising a floating gate and a control gate. According to the present disclosure, the memory comprises a source plane common to the memory cells of the word line, to collect programming currents passing through memory cells during their programming, and the selection transistor sections of the memory cells are connected to the source plane. A programming current control circuit is configured to control the programming current passing through the memory cells by acting on a selection voltage applied to a selection line.
First claim
Opening claim text (preview).
The invention claimed is: 1. An integrated circuit memory, comprising: at least one word line that includes a row of split gate memory cells, each split gate memory cell including a selection transistor section, having an embedded vertical selection gate, and a floating-gate transistor section having a horizontal floating gate and a horizontal control gate; a selection line configured to apply a selection voltage to the selection gates of the memory cells of the row; a control…
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- G11C16/10Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9224482B2 cover?
- The present disclosure relates to a memory comprising at least one word line comprising a row of split gate memory cells each comprising a selection transistor section comprising a selection gate and a floating-gate transistor section comprising a floating gate and a control gate. According to the present disclosure, the memory comprises a source plane common to the memory cells of the word lin…
- Who is the assignee on this patent?
- St Microelectronics Rousset
- What technology area does this patent fall under?
- Primary CPC classification G11C16/10. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).