Blocker-tolerant wideband noise-canceling receivers

US9219507B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9219507-B2
Application numberUS-201213584492-A
CountryUS
Kind codeB2
Filing dateAug 13, 2012
Priority dateAug 13, 2012
Publication dateDec 22, 2015
Grant dateDec 22, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with minimal gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to minimize added noise and voltage gain prior to baseband filtering, which are critical factors in eliminating narrow-band off-chip RF filtering.

First claim

Opening claim text (preview).

What is claimed is: 1. A receiver front-end for receiving a radio-frequency (RF) signal represented by an RF voltage signal and an RF current signal from an antenna, the receiver front-end comprising: a main down-conversion path comprising: a first passive mixer configured to mix the RF current signal with a local-oscillator (LO) signal to provide a first down-converted signal, and a first transimpedance amplifier configured to apply a first gain to the first down-converted signal to provide a first output signal; and an auxiliary down-conversion path comprising: a transconductance cell configured to convert the RF voltage signal into a corresponding current signal, a second passive mixer configured to mix the corresponding current signal with the LO signal to provide a second down-converted signal, and a second transimpedance amplifier configured to apply a second gain to the second down-converted signal to provide a second output signal, wherein the RF voltage signal is a voltage between a source impedance of the antenna and an impedance matching resistor, and the RF current signal is a current flowing through the impedance matching resistor. 2. The receiver front-end of claim 1 , wherein the first gain is determined based on the second gain and the source impedance of the antenna. 3. The receiver front-end of claim 1 , wherein the first gain is proportional to the product of the second gain and the source impedance of the antenna. 4. The receiver front-end of claim 1 , wherein the transconductance cell is an inverter. 5. The receiver front-end of claim 1 , further comprising: a baseband processing block configured to process the first output signal and the second output signal as two ends of a differential signal. 6. The receiver front-end of claim 1 , further comprising: a baseband processing block configured to sense the first output signal and the second output signal differentially such that noise from the impedance matching resistor is canceled and the RF signal is reinforced. 7. The receiver front-end of claim 6 , wherein the baseband processing block is further configured to low-pass filter and digitize the first output signal and the second output signal. 8. The receiver front-end of claim 1 , wherein the first passive mixer is included within a first harmonic rejection mixer and the second passive mixer is included within a second harmonic rejection mixer. 9. The receiver front-end of claim 1 , further comprising a low-pass filter configured to filter the first output signal. 10. The receiver front-end of claim 9 , wherein the low-pass filter is a switched capacitor filter. 11. A receiver front-end for receiving a radio-frequency (RF) signal represented by an RF voltage signal and an RF current signal from an antenna, the RF front-end comprising: a first passive mixer configured to down-convert the RF current signal to provide a first down-converted signal; a first transimpedance amplifier configured to receive the first down-converted signal from the first passive mixer at a first summing node at virtual ground and apply a first gain to the first down-converted signal to provide a first output signal; a second passive mixer configured to down-convert a current signal corresponding to the RF voltage signal to provide a second down-converted signal; and a second transimpedance amplifier configured to receive the second down-converted signal from the second passive mixer at a second summing node at virtual ground and apply a second gain to the second down-converted signal to provide a second output signal, wherein the RF voltage signal is a voltage between a source impedance of the antenna and an impedance matching resistor and the RF current signal is a current flowing through the impedance matching resistor. 12. The receiver front-end of claim 11 , wherein the first gain is determined based on the second gain and the source impedance of the antenna. 13. The receiver front-end of claim 11 , wherein the first gain is proportional to the product of the second gain and the source impedance of the antenna. 14. The receiver front-end of claim 11 , further comprising: a baseband processing block configured to process the first output signal and the second output signal as two ends of a differential signal. 15. The receiver front-end of claim 11 , further comprising: a baseband processing block configured to sense the first output signal and the second output signal differentially such that noise from the impedance matching resistor is canceled and the RF signal is reinforced. 16. The receiver front-end of claim 15 , wherein the baseband processing block is further configured to low-pass filter and digitize the first output signal and the second output signal. 17. The receiver front-end of claim 11 , wherein the first passive mixer is included within a first harmonic rejection mixer and the second passive mixer is included within a second harmonic rejection mixer. 18. The receiver front-end of claim 11 , further comprising a low-pass filter configured to filter the first output signal. 19. The receiver front-end of claim 18 , wherein the low-pass filter is a switched capacitor filter. 20. A receiver front-end for receiving a radio-frequency (RF) signal represented by an RF voltage signal and an RF current signal from an antenna, the RF front-end comprising: a main down-conversion path configured to down-convert the RF current signal to provide a first down-converted signal and apply a first gain to the first down-converted signal; and an auxiliary down-conversion path configured to down-convert a current signal corresponding to the RF voltage signal to provide a second down-converted signal and apply a second gain to the second down-converted signal, wherein the first gain is substantially proportional to the result of multiplying the second gain and a source impedance associated with the antenna.

Assignees

Inventors

Classifications

  • H04B1/10Primary

    Means associated with receiver for limiting or suppressing noise or interference · CPC title

  • H04B1/1036Primary

    with automatic suppression of narrow band noise or interference, e.g. by using tuneable notch filters (H04B1/123 takes precedence; filter circuits H03H) · CPC title

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What does patent US9219507B2 cover?
Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with minimal gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to minimize added noise and voltage gain prior to baseband filtering, which are …
Who is the assignee on this patent?
Rofougaran Ahmadreza, Darabi Hooman, Murphy David, and 1 more
What technology area does this patent fall under?
Primary CPC classification H04B1/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 22 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).