Surface mount type piezoelectric oscillator

Patent metadata

Field	Value
Publication number	US-9219217-B2
Application number	US-201314381117-A
Country	US
Kind code	B2
Filing date	Jan 8, 2013
Priority date	Feb 28, 2012
Publication date	Dec 22, 2015
Grant date	Dec 22, 2015

Abstract

A piezoelectric oscillator has an insulating base having a housing portion where internal terminal pads are formed, an integrated circuit (IC) element having rectangular pads bonded to the internal terminal (IT) pads, and a piezoelectric oscillation element (POE) connected to the base and IC element. The IT pads include two opposing first IT pads connected to the POE, two opposing second IT pads, one of which is for AC output, and two opposing third IT pads formed between the first IT pads and the second IT pads. Along a part of perimeter of the first IT pads, the third IT pads and wiring patterns which respectively extend the third IT pads are formed as conductive paths for blocking radiation noise. The first IT pads and the second IT pads are spaced apart with the conductive paths interposed therebetween.

First claim

The invention claimed is:

1. A surface mount type piezoelectric oscillator, comprising:
an insulating base including a laminated substrate and provided with a housing portion and a plurality of internal terminal pads formed on an inner bottom surface of the housing portion;
an integrated circuit element having a rectangular shape and pads formed on a main surface thereof and bonded to a part of the internal terminal pads of the base by means of bumps; and
a piezoelectric oscillation element electromechanically bonded to another part of the internal terminal pads of the base and electrically connected to the integrated circuit element, wherein
the pads of the integrated circuit element include two opposing first pads formed near a first side of the integrated circuit element, two opposing second pads formed near a second side opposite to the first side of the integrated circuit element, and two opposing third pads formed between the first pads and the second pads, and one of the two second pads is used to output alternating current signals of the integrated circuit element,
the internal terminal pads of the base include two opposing first internal terminal pads electrically connected to the piezoelectric oscillation element and bonded to the two first pads of the integrated circuit element, two opposing second internal terminal pads bonded to the two second pads of the integrated circuit element, and two opposing third internal terminal pads bonded to the two third pads of the integrated circuit element, and
the third internal terminal pads and wiring patterns which extend the third internal terminal pads are formed along a part of perimeter of the first internal terminal pads as conductive paths for blocking radiation noise,
the two first internal terminal pads and the two second internal terminal pads are respectively formed at positions spaced apart with the conductive paths interposed therebetween, and
the wiring patterns which extend the third internal terminal pads are formed on the inner bottom surface of the housing portion along with the first to third internal terminal pads,
the conductive paths include a first conductive path and a second conductive path, the first conductive path having substantially equal width over a whole thereof along a part of a perimeter of one of the two opposing first internal terminal pads, the second conductive path having substantially equal width over a whole thereof along a part of the perimeter of an other of the two opposing first internal terminal pads,
a direct current potential or ground potential is applied to both the first conductive path and the second conductive path, and
an opposing interval between the first terminal pads is shorter than each width in an opposing direction of the first internal terminal pads, and an opposing interval between the third internal terminal pads is substantially the same extent as the opposing interval between the first internal terminal pads.

2. The surface mount type piezoelectric oscillator as claimed in claim 1 , wherein
the first internal terminal pads and the second internal terminal pads are formed in larger widths than the third internal terminal pads located between the first and second internal terminal pads in a direction where the two first internal terminal pads, the two second internal terminal pads, and the two third internal terminal pads are juxtaposed.

3. The surface mount type piezoelectric oscillator as claimed in claim 1 , wherein the base includes a ceramic substrate.

4. The surface mount type piezoelectric oscillator as claimed in claim 1 , wherein the pads are bonded by flip-chip bonding.

5. The surface mount type piezoelectric oscillator as claimed in claim 1 , wherein
the first conductive path is formed substantially in an L-letter shape along the part of perimeter of one of the two opposing first internal terminal pads; and
the second conductive path is formed substantially in an L-letter shape along the part of perimeter of the other one of the two opposing first internal terminal pads.

6. The surface mount type piezoelectric oscillator as claimed in claim 5 , wherein
one of the two opposing first internal terminal pads is for inputting alternate current signals, and the other one of the two opposing first internal terminal pads is for outputting alternate current signals, and
one of the two opposing second internal terminal pads bonded to the two second pads is for outputting alternate current signals, and the other one of the two opposing second internal terminal pads is for grounding.

7. The surface mount type piezoelectric oscillator as claimed in claim 1 , wherein the piezoelectric oscillation element is an AT-cut crystal oscillation plate.

8. The surface mount type piezoelectric oscillator as claimed in claim 1 , wherein
the base includes a bottom portion which is a lowermost layer, a first bank portion which is a middle layer, and a second bank portion which is an uppermost layer,
the bottom portion is formed from a single plate having a rectangular shape in planar view and made of a ceramic material,
the first bank portion is formed of a ceramic material on the bottom portion in a frame shape in planar view,
the second bank portion is formed of a ceramic material on the first bank portion in a frame shape in planar view,
the housing portion of the base includes a first housing portion formed by the first bank portion where the integrated circuit element is housed, and a second housing portion formed by the second bank portion where the piezoelectric oscillation element is housed, and
the first to third internal terminal pads are formed on an inner bottom surface of the first housing portion.

Assignees

• Daishinku Corp

Inventors

• Kojo Takuya

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H03H9/02086

  Means for compensation or elimination of undesirable effects · CPC title

• H01L41/0475

  Electricity · mapped topic

• H01L41/0913

  Electricity · mapped topic

• H01L41/053

  Electricity · mapped topic