Active matrix substrate and liquid crystal display device
US-2024377690-A1 · Nov 14, 2024 · US
Array substrate and method for manufacturing the same, and display device
US9219082B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9219082-B2 |
| Application number | US-201314361883-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 19, 2013 |
| Priority date | Jul 23, 2013 |
| Publication date | Dec 22, 2015 |
| Grant date | Dec 22, 2015 |
How to read this patent
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
- Title
What the patent document calls the invention.
- Abstract
A short plain-language summary of the technical disclosure.
- Assignees and inventors
Who owns or filed the patent and who is credited as inventor.
- Key dates
Filing, priority, publication, and grant dates set the timeline.
- First independent claim
The legal scope of protection — read this for what is actually claimed.
- CPC / IPC classifications
Technology tags used to group this patent with similar filings.
- Citations and related patents
Prior art links and similar publications in this corpus.
Abstract
Official abstract text for this publication.
The invention relates to an array substrate for a display device and to a method for manufacturing an array substrate comprising a thin-film transistor (“TFT”). An array substrate according to an embodiment of the invention comprises a source electrode, a gate electrode and a drain electrode, wherein the gate electrode is located on a first metal layer, the source electrode and the drain electrode are located on a second metal layer, and in the case that dislocation occurs between the first metal layer and the second metal layer, the area of the overlapping region between the source electrode and the gate electrode keeps constant.
First claim
Opening claim text (preview).
What is claimed is: 1. An array substrate comprising a thin film transistor, the thin film transistor comprises a source electrode, a gate electrode and a drain electrode, wherein the gate electrode is located on a first metal layer, and the source electrode and the drain electrode are located on a second metal layer, wherein: the shapes of the source electrode and the gate electrode are configured so that when dislocation occurs between the first metal layer and the second metal…
Assignees
Inventors
Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Patent family
Related publications grouped by family.
External sources
Next steps
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US9219082B2 cover?
- The invention relates to an array substrate for a display device and to a method for manufacturing an array substrate comprising a thin-film transistor (“TFT”). An array substrate according to an embodiment of the invention comprises a source electrode, a gate electrode and a drain electrode, wherein the gate electrode is located on a first metal layer, the source electrode and the drain electr…
- Who is the assignee on this patent?
- Boe Technology Group Co Ltd, Hefei Boe Optoelectronics Tech
- What technology area does this patent fall under?
- Primary CPC classification H10D86/441. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 22 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).