Pipelined charge redistribution decision feedback equalizer (DFE) for a receiver
US-9225561-B2 · Dec 29, 2015 · US
Decision feedback equalizer
US9215112B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9215112-B2 |
| Application number | US-201013578217-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 24, 2010 |
| Priority date | Feb 23, 2010 |
| Publication date | Dec 15, 2015 |
| Grant date | Dec 15, 2015 |
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Abstract
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A decision-feedback equalizer (DFE) samples an analog input signal against M references during the same symbol time to produce M speculative samples. Select logic in the DFE then decodes N bits resolved previously for previous symbol times to select one of the M speculative samples as the present resolved bit. The present resolved bit is then stored as the most recent previously resolved bit in preparation for the next symbol time. The select logic can be can be programmable to accommodate process, environmental, and systematic variations.
First claim
Opening claim text (preview).
What is claimed is: 1. An equalizer to equalize an analog signal responsive to previously resolved bits of the analog signal, the equalizer comprising: storage to store N of the previously resolved bits; an analog-to-digital converter (ADC) to sample the analog signal during a given symbol time to produce M speculative samples; and select logic to select one of the M speculative samples as a presently resolved bit, the select logic including: a programmable switch having M sw…
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- H04L25/03146Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9215112B2 cover?
- A decision-feedback equalizer (DFE) samples an analog input signal against M references during the same symbol time to produce M speculative samples. Select logic in the DFE then decodes N bits resolved previously for previous symbol times to select one of the M speculative samples as the present resolved bit. The present resolved bit is then stored as the most recent previously resolved bit in…
- Who is the assignee on this patent?
- Leibowitz Brian S, Kim Jaeha, Rambus Inc
- What technology area does this patent fall under?
- Primary CPC classification H04L25/03146. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).