Semiconductor device

US9214520B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9214520-B2
Application numberUS-201414330597-A
CountryUS
Kind codeB2
Filing dateJul 14, 2014
Priority dateNov 28, 2009
Publication dateDec 15, 2015
Grant dateDec 15, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.

First claim

Opening claim text (preview).

The invention claimed is: 1. A semiconductor device comprising: a transistor comprising: a first gate; a first gate insulating film over the first gate; an oxide semiconductor film over the first gate insulating film; a second gate insulating film over the oxide semiconductor film; and a second gate over the second gate insulating film, wherein the oxide semiconductor film comprises indium and zinc, wherein the oxide semiconductor film comprises a crystalline region…

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What does patent US9214520B2 cover?
An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which ar…
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).