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Promoting transactions hitting critical beat of cache line load requests
US9213640B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9213640-B2 |
| Application number | US-201313864844-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 17, 2013 |
| Priority date | Apr 17, 2013 |
| Publication date | Dec 15, 2015 |
| Grant date | Dec 15, 2015 |
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Abstract
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A processor includes a cache memory, a first core including an instruction execution unit, and a memory bus coupling the cache memory to the first core. The memory bus is operable to receive a first portion of a cache line of data for the cache memory, the first core is operable to identify a plurality of data requests targeting the cache line and the first portion and select one of the identified plurality of data requests for execution, and the memory bus is operable to forward the first portion to the instruction execution unit and to the cache memory in parallel.
First claim
Opening claim text (preview).
What is claimed: 1. A processor, comprising: a cache memory; a first core comprising an instruction execution unit; and a memory bus coupling the cache memory to the first core, wherein the memory bus is operable to receive a first portion of a cache line of data for the cache memory, the first core is operable to identify a plurality of data requests targeting the cache line and the first portion and select one of the identified plurality of data requests for execution, and t…
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- G06F12/0802Primary
Physics · mapped topic
Physics · mapped topic
Cross-Sectional Technologies · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9213640B2 cover?
- A processor includes a cache memory, a first core including an instruction execution unit, and a memory bus coupling the cache memory to the first core. The memory bus is operable to receive a first portion of a cache line of data for the cache memory, the first core is operable to identify a plurality of data requests targeting the cache line and the first portion and select one of the identif…
- Who is the assignee on this patent?
- Advanced Micro Devices Inc
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0802. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).