Non-volatile memory devices and control and operation thereof

Patent metadata

Field	Value
Publication number	US-9213630-B2
Application number	US-201213399587-A
Country	US
Kind code	B2
Filing date	Feb 17, 2012
Priority date	Jul 19, 2002
Publication date	Dec 15, 2015
Grant date	Dec 15, 2015

Abstract

An improved non-volatile erase block memory device apparatus and method is described that incorporates an improved addressing scheme to provide for extended addressing allowing redundant erase blocks that are not utilized to repair general use erase blocks of the main memory array to be accessed and utilized as additional storage space by an end user. The additional storage space formed by the unused redundant erase blocks and the specified storage space of the main memory array is presented to the end user as a single contiguous address space. Additionally, the redundant erase blocks can be utilized to repair any damaged erase block in the memory array of the non-volatile erase block memory or Flash memory device regardless of bank placement.

First claim

What is claimed is:

1. A system comprising:
control apparatus;
a non-volatile memory integrated circuit chip including:
a non-volatile memory array organized into divisions, and the non-volatile memory array being further divided into subdivisions, each in a respective division of the divisions, and the subdivisions being blocks that include a plurality of general use erase blocks and redundant erase blocks; and
a control circuit including a storage configured to have redirec…

Assignees

• Lakhani Vinod
• Louie Benjamin
• Conversant Intellectual Property Man Inc

Inventors

• Lakhani Vinod
• Louie Benjamin

Classifications

• G11C16/04

  Physics · mapped topic

• G11C29/808

  Physics · mapped topic

• G11C29/76

  Physics · mapped topic

• G11C29/82

  Physics · mapped topic

• G06F12/0246 Primary

  Physics · mapped topic