Error response circuit, semiconductor integrated circuit, and data transfer control method

US9213617B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9213617-B2
Application numberUS-201313785123-A
CountryUS
Kind codeB2
Filing dateMar 5, 2013
Priority dateMar 27, 2012
Publication dateDec 15, 2015
Grant dateDec 15, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

In an error response circuit an analysis circuit unit analyzes a command transmitted from a first circuit section to a second circuit section, and detects a status of data transfer between the first circuit section and the second circuit section. A response circuit unit generates an error signal in accordance with the detected status of the data transfer in response to the second circuit section changing from a first power consumption state to a second power consumption state in which power consumption is lower than power consumption in the first power consumption state. A switching circuit unit transmits the error signal to the first circuit section in place of a response signal that is responsive to the command and transmitted from the second circuit section to the first circuit section.

First claim

Opening claim text (preview).

What is claimed is: 1. An error response circuit comprising: an analysis circuit unit configured to analyze a command transmitted from a first circuit section to a second circuit section and to detect a status which indicated whether data transfer between the first circuit section and the second circuit section is being performed or not; a response circuit unit configured to generate an error signal in response to the second circuit section changing from a first power consumptio…

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What does patent US9213617B2 cover?
In an error response circuit an analysis circuit unit analyzes a command transmitted from a first circuit section to a second circuit section, and detects a status of data transfer between the first circuit section and the second circuit section. A response circuit unit generates an error signal in accordance with the detected status of the data transfer in response to the second circuit sectio…
Who is the assignee on this patent?
Fujitsu Semiconductor Ltd, Socionext Inc
What technology area does this patent fall under?
Primary CPC classification G06F11/0745. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).