Information processing system
US-2024248797-A1 · Jul 25, 2024 · US
Semiconductor memory controlling device which writes data and error correction codes into different semiconductor storage drives
US9213604B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9213604-B2 |
| Application number | US-201314017072-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 3, 2013 |
| Priority date | Sep 22, 2010 |
| Publication date | Dec 15, 2015 |
| Grant date | Dec 15, 2015 |
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Abstract
Official abstract text for this publication.
A semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor memory controlling device to which a plurality of semiconductor memory drives are connected and that writes data requested to be written with a logical address specified by an information processing apparatus, the data including one or more pieces of first data, the first data having a predetermined size, the semiconductor memory controlling device comprising: a write control unit configured to write a predetermined number of the one or mo…
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Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
- G06F11/108Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9213604B2 cover?
- A semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for st…
- Who is the assignee on this patent?
- Toshiba Kk
- What technology area does this patent fall under?
- Primary CPC classification G06F11/108. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Dec 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).