Gate isolation features and methods of fabricating the same in semiconductor devices
US-2024379673-A1 · Nov 14, 2024 · US
US9209246B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9209246-B2 |
| Application number | US-201313934794-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 3, 2013 |
| Priority date | Apr 12, 2007 |
| Publication date | Dec 8, 2015 |
| Grant date | Dec 8, 2015 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A gated microelectronic device is provided that has a source with a source ohmic contact with the source characterized by a source dopant type and concentration. A drain with a drain ohmic contact with the drain characterized by a drain dopant type and concentration. An intermediate channel portion characterized by a channel portion dopant type and concentration. An insulative dielectric is in contact with the channel portion and overlaid in turn by a gate. A gate contact applies a gate voltage bias to control charge carrier accumulation and depletion in the underlying channel portion. This channel portion has a dimension normal to the gate which is fully depleted in the off-state. The dopant type is the same across the source, drain and the channel portion of the device. The device on-state current is determined by the doping and, unlike a MOSFET, is not directly proportional to device capacitance.
Opening claim text (preview).
The invention claimed is: 1. A gated microelectronic device comprising: an insulator substrate; a source supported on said insulator substrate, said source having a first metal contact defining a first ohmic contact interface with said source, said source having a source dopant type and a source dopant concentration and defining a source linear extent; a semiconducting drain supported on said insulator substrate, said semiconducting drain having a second metal…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Related publications grouped by family.
Free tools are coming soon. Tell us what you want to track and we'll notify you.
Answers are generated from the same data shown on this page.