Method of fabricating semiconductor device

Patent metadata

Field	Value
Publication number	US-9209239-B2
Application number	US-201213718663-A
Country	US
Kind code	B2
Filing date	Dec 18, 2012
Priority date	Jul 13, 2012
Publication date	Dec 8, 2015
Grant date	Dec 8, 2015

Abstract

The method includes forming a metal interconnection layer and a first interlayer insulating layer on a semiconductor substrate, forming a reservoir capacitor region by etching the first interlayer insulating layer to expose the metal interconnection layer, forming a barrier metal layer on the reservoir capacitor region, forming a sacrificial insulating layer on the barrier metal layer in a lower portion of the reservoir capacitor region, performing a pre-cleaning process to remove the barrier metal layer on a sidewall of the reservoir capacitor region, and removing the sacrificial insulating layer.

First claim

What is claimed is:

1. A method of fabricating a semiconductor device, the method comprising:
forming a metal interconnection layer, a first interlayer insulating layer, and an insulating layer for capacitor support over a semiconductor substrate;
forming a trench for a reservoir capacitor by etching the insulating layer for capacitor support and the first interlayer insulating layer to expose the metal interconnection layer;
forming a barrier metal layer over an inner surface…

Assignees

• Sk Hynix Inc

Inventors

• Kwak Eun Hye
• Yun Hyeong Uk

Classifications

• H10W20/43

  Electricity · mapped topic

• H10D1/716

  Electricity · mapped topic

• H10D1/696 Primary

  Electricity · mapped topic

• H10D1/043

  Electricity · mapped topic

• H10D1/042

  Electricity · mapped topic