Semiconductor device having ground shield structure and fabrication method thereof

US9209130B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9209130-B2
Application numberUS-201314028733-A
CountryUS
Kind codeB2
Filing dateSep 17, 2013
Priority dateOct 30, 2012
Publication dateDec 8, 2015
Grant dateDec 8, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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Semiconductor devices having a ground shield structure and methods for their formation are provided herein. An exemplary semiconductor device can include a substrate, a ground ring, a ground shield, an electronic device, and/or an insulation layer. The ground ring can be disposed over the substrate. The ground shield can be disposed over the substrate and surrounded by the ground ring. The ground shield can include a plurality of coaxial conductive wirings and a metal wire passing through the plurality of coaxial conductive wirings along a radial direction. The metal wire can be connected to the ground ring. The electronic device can be disposed over the ground shield. The insulation layer can be disposed between the ground shield and the electronic device.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device having a ground shield comprising: a substrate; a ground ring disposed over the substrate; a ground shield disposed over the substrate and surrounded by the ground ring, wherein the ground shield includes a plurality of coaxial conductive wirings and a metal wire passing through the plurality of coaxial conductive wirings along a radial direction, and the metal is connected to the ground ring, wherein the ground shield includes…

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What does patent US9209130B2 cover?
Semiconductor devices having a ground shield structure and methods for their formation are provided herein. An exemplary semiconductor device can include a substrate, a ground ring, a ground shield, an electronic device, and/or an insulation layer. The ground ring can be disposed over the substrate. The ground shield can be disposed over the substrate and surrounded by the ground ring. The grou…
Who is the assignee on this patent?
Semiconductor Mfg Int Shanghai
What technology area does this patent fall under?
Primary CPC classification H10W20/497. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 08 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).