Coherent attached processor proxy having hybrid directory

US9208091B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9208091-B2
Application numberUS-201313921844-A
CountryUS
Kind codeB2
Filing dateJun 19, 2013
Priority dateJun 19, 2013
Publication dateDec 8, 2015
Grant dateDec 8, 2015

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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A coherent attached processor proxy (CAPP) includes transport logic having a first interface configured to support communication with a system fabric of a primary coherent system and a second interface configured to support communication with an attached processor (AP) that is external to the primary coherent system and that includes a cache memory that holds copies of memory blocks belonging to a coherent address space of the primary coherent system. The CAPP further includes one or more master machines that initiate memory access requests on the system fabric of the primary coherent system on behalf of the AP, one or more snoop machines that service requests snooped on the system fabric, and a CAPP directory having a precise directory having a plurality of entries each associated with a smaller data granule and a coarse directory having a plurality of entries each associated with a larger data granule.

First claim

Opening claim text (preview).

What is claimed is: 1. A coherent attached processor proxy (CAPP), comprising: transport logic having a first interface configured to support communication with a system fabric of a primary coherent system and a second interface configured to support communication with an attached processor (AP) that is external to the primary coherent system and that includes a cache memory that holds copies of memory blocks belonging to a coherent address space of the primary coherent system; operation handling logic including: a CAPP directory of cachelines of interest to the AP, wherein the CAPP directory includes: a precise directory having a plurality of entries each associated with a respective one of a plurality of smaller data granules; and a coarse directory having a plurality of entries each associated with a respective one of a plurality of larger data granules; one or more master machines that initiate memory access requests on the system fabric of the primary coherent system on behalf of the AP; and one or more snoop machines that service requests snooped on the system fabric. 2. The coherent attached processor proxy (CAPP) of claim 1 , wherein: the smaller data granule comprises a single cacheline of data; and the larger data granule comprises a plurality of contiguous cachelines. 3. The coherent attached processor proxy (CAPP) of claim 1 , wherein the CAPP installs an entry in the coarse directory in a data-valid coherence state in advance of receipt of all of the larger data granule by the AP. 4. The coherent attached processor proxy (CAPP) of claim 1 , wherein the CAPP determines a composite coherence state for a target address by prioritizing a coherence state indicated by the precise directory over a coherence state indicated by the coarse directory. 5. The coherent attached processor proxy (CAPP) of claim 1 , wherein the CAPP, responsive to a target address of a snooped memory access request missing in the precise directory and hitting in the coarse directory, provides a Retry response and installs an entry corresponding to the target address in the precise directory. 6. The coherent attached processor proxy (CAPP) of claim 1 , wherein the CAPP, responsive to at least one AP command, decomposes an entry in the coarse directory into a plurality of entries in the precise directory. 7. A processing unit, comprising: at least one processor core; a cache coupled to the processor core; and a coherent attached processor proxy (CAPP) in accordance with claim 1 . 8. A data processing system, comprising: a primary coherent system including: a system fabric; a plurality of processing units coupled to the system fabric for communication therebetween, wherein a processing unit among the plurality of processing units includes: at least one processor core; a cache coupled to the processor core; and a coherent attached processor proxy (CAPP), including: transport logic having a first interface configured to support communication with a system fabric of a primary coherent system and a second interface configured to support communication with an attached processor (AP) that is external to the primary coherent system and that includes a cache memory that holds copies of memory blocks belonging to a coherent address space of the primary coherent system; operation handling logic including:  a CAPP directory of cachelines of interest to the AP, wherein the CAPP directory includes:  a precise directory having a plurality of entries each associated with a respective one of a plurality of smaller data granules; and  a coarse directory having a plurality of entries each associated with a respective one of a plurality of larger data granules;  one or more master machines that initiate memory access requests on the system fabric of the primary coherent system on behalf of the AP; and  one or more snoop machines that service requests snooped on the system fabric. 9. The data processing system of claim 8 , wherein: the smaller data granule comprises a single cacheline of data; and the larger data granule comprises a plurality of contiguous cachelines. 10. The data processing system of claim 8 , wherein the CAPP installs an entry in the coarse directory in a data-valid coherence state in advance of receipt of all of the larger data granule by the AP. 11. The data processing system of claim 8 , wherein the CAPP determines a composite coherence state for a target address by prioritizing a coherence state indicated by the precise directory over a coherence state indicated by the coarse directory. 12. The data processing system of claim 8 , wherein the CAPP, responsive to a target address of a snooped memory access request missing in the precise directory and hitting in the coarse directory, provides a Retry response and installs an entry corresponding to the target address in the precise directory. 13. The data processing system of claim 8 , wherein the CAPP, responsive to at least one AP command, decomposes an entry in the coarse directory into a plurality of entries in the precise directory. 14. The data processing system of claim 8 , and further comprising the AP.

Assignees

Inventors

Classifications

  • using a bus scheme, e.g. with bus monitoring or watching means · CPC title

  • Coherency control relating to peripheral accessing, e.g. from DMA or I/O device · CPC title

  • Associative directories (G06F12/0822 takes precedence) · CPC title

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What does patent US9208091B2 cover?
A coherent attached processor proxy (CAPP) includes transport logic having a first interface configured to support communication with a system fabric of a primary coherent system and a second interface configured to support communication with an attached processor (AP) that is external to the primary coherent system and that includes a cache memory that holds copies of memory blocks belonging t…
Who is the assignee on this patent?
IBM, Globalfoundries Inc
What technology area does this patent fall under?
Primary CPC classification G06F12/0831. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 08 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).