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Abnormal clock rate detection in imaging sensor arrays
US9207708B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9207708-B2 |
| Application number | US-201314106666-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 13, 2013 |
| Priority date | Apr 23, 2010 |
| Publication date | Dec 8, 2015 |
| Grant date | Dec 8, 2015 |
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Abstract
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Various techniques are provided to detect abnormal clock rates in devices such as imaging sensor devices (e.g., infrared and/or visible light imaging devices). In one example, a device may include a clock rate detection circuit that may be readily integrated as part of the device to provide effective detection of an abnormal clock rate. The device may include a ramp generator, a counter, and/or other components which may already be implemented as part of the device. The ramp generator may generate a ramp signal independent of a clock signal provided to the device, while the counter may increment or decrement a count value in response to the clock signal. The device may include a comparator adapted to select the current count value of the counter when the ramp signal reaches a reference signal. A processor of the device may be adapted to determine whether the clock signal is operating in an acceptable frequency range, based on the selected count value.
First claim
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What is claimed is: 1. A device comprising: a counter adapted to receive a clock signal and adjust a count value in response to the clock signal; a ramp generator adapted to generate a ramp signal having a slope independent of the clock signal; a comparator adapted to receive a reference signal and the ramp signal, and select the current count value in response to the reference signal and the ramp signal; and a processor adapted to determine, based on the selected count valu…
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Frequently asked questions
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- What does patent US9207708B2 cover?
- Various techniques are provided to detect abnormal clock rates in devices such as imaging sensor devices (e.g., infrared and/or visible light imaging devices). In one example, a device may include a clock rate detection circuit that may be readily integrated as part of the device to provide effective detection of an abnormal clock rate. The device may include a ramp generator, a counter, and/or…
- Who is the assignee on this patent?
- Flir Systems
- What technology area does this patent fall under?
- Primary CPC classification H04N23/57. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 08 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).