Chip packaging method, chip packaging module, and embedded substrate chip packaging structure
US-2024413138-A1 · Dec 12, 2024 · US
Electronic components assembly
US9204530B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9204530-B2 |
| Application number | US-201313869553-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 24, 2013 |
| Priority date | Oct 25, 2010 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The present invention relates to electronic components assembly for electrically connecting electronic components to each other, wherein a wiring formed on a surface of a first electronic component and a wiring formed on a surface of a second electronic component face each other, and are bonded to each other with an electric conductor interposed therebetween, so as to electrically connect the first electronic component and the second electronic component. The electric conductor is a resin composition containing solder or conductive filler.
First claim
Opening claim text (preview).
The invention claimed is: 1. An assembly of electronic components in which electronic components are electrically connected to each other, wherein a wiring electrically connecting a first electronic component and a wiring electrically connecting a second electronic component face each other, and are bonded to each other with an electric conductor interposed therebetween, so as to electrically connect the first electronic component and the second electronic component, and wherein…
Assignees
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9204530B2 cover?
- The present invention relates to electronic components assembly for electrically connecting electronic components to each other, wherein a wiring formed on a surface of a first electronic component and a wiring formed on a surface of a second electronic component face each other, and are bonded to each other with an electric conductor interposed therebetween, so as to electrically connect the f…
- Who is the assignee on this patent?
- Panasonic Corp
- What technology area does this patent fall under?
- Primary CPC classification H10W74/012. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).