System, method, and computer program product for ensuring that each simulation in a regression is running a unique configuration

Patent metadata

Field	Value
Publication number	US-9202004-B1
Application number	US-201414449347-A
Country	US
Kind code	B1
Filing date	Aug 1, 2014
Priority date	Aug 1, 2014
Publication date	Dec 1, 2015
Grant date	Dec 1, 2015

Abstract

The present disclosure relates to a computer-implemented method for electronic design verification. Embodiments may include providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages. Embodiment may also include calculating, using one or more processors, configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of the electronic design. Embodiments may further include storing a seed for each configuration, wherein each seed may be configured to cause a constraint solver to set a defined set of values for one or more random variables in a class associated with the seed.

First claim

What is claimed is:

1. A computer-implemented method for electronic design verification comprising:
providing an electronic design including, at least in part, one or more hardware description languages and one or more software programming languages;
calculating, using one or more processors, configuration information without analyzing the electronic design, wherein the configuration information includes one or more memory elements configured to control a mode of operation of t…

Assignees

• Cadence Design Systems Inc

Inventors

• Cohen Daniel A
• Pierce John Leroy
• Weiss Nir

Classifications

• G06F30/398 Primary

  Physics · mapped topic

• G06F17/5081 Primary

  Physics · mapped topic