System and method for electronic design routing between terminals

US9202001B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9202001-B1
Application numberUS-201213682036-A
CountryUS
Kind codeB1
Filing dateNov 20, 2012
Priority dateNov 20, 2012
Publication dateDec 1, 2015
Grant dateDec 1, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

The present disclosure relates to a computer-implemented method for routing in an electronic circuit design. The method may include assigning a plurality of rats interconnecting one or more terminals associated with a layout of the electronic circuit design to a bundle. The method may further include sequencing the plurality of rats within the assigned bundle to generate a defined sequence of rats within the assigned bundle. The method may also include routing the plurality of rats between the one or more terminals, based upon, at least in part, the defined sequence.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method for routing in an electronic circuit design comprising: assigning, using one or more computing devices, a plurality of rats interconnecting one or more terminals associated with a layout of the electronic circuit design to a bundle; sequencing, using the one or more computing devices, the plurality of rats within the assigned bundle to generate a defined sequence of rats within the assigned bundle, wherein sequencing involves…

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What does patent US9202001B1 cover?
The present disclosure relates to a computer-implemented method for routing in an electronic circuit design. The method may include assigning a plurality of rats interconnecting one or more terminals associated with a layout of the electronic circuit design to a bundle. The method may further include sequencing the plurality of rats within the assigned bundle to generate a defined sequence of r…
Who is the assignee on this patent?
Cadence Design Systems Inc
What technology area does this patent fall under?
Primary CPC classification G06F30/398. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).