Integrated circuit design flow with device array layout generation
US-9092589-B2 · Jul 28, 2015 · US
US9202000B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9202000-B1 |
| Application number | US-201414503271-A |
| Country | US |
| Kind code | B1 |
| Filing date | Sep 30, 2014 |
| Priority date | Sep 30, 2014 |
| Publication date | Dec 1, 2015 |
| Grant date | Dec 1, 2015 |
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Systems and methods for creating and placing custom guard rings create a guard ring from a plurality of unit cells reflecting the devices that are enclosed in the guard ring. Using a unit cell identified by a design tool user as the basic unit of the guard ring, with a few additional setup parameters, a complete, content-aware guard ring is created. The guard ring will consist of a collection of the identified unit cells placed around the circuit devices that are to be protected. The created guard ring will function as a single circuit component. Edits to the dimensions and/or parameters of the unit cell will affect the placement of the unit cell in the protected area and will therefore require creation of a new guard ring consistent with the changed parameters.
Opening claim text (preview).
We claim: 1. A method for using a processor for creation of a guard ring in a circuit design, the method comprising: upon receipt of a unit cell based on a portion of the circuit design, identifying configuration parameters for the guard ring, comprising a plurality of the unit cells, to be placed around the portion of the circuit design; identifying an area around the portion where the guard ring will be placed; and iteratively performing the following steps until the identif…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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